MC100E196FNR2 ON Semiconductor, MC100E196FNR2 Datasheet

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MC100E196FNR2

Manufacturer Part Number
MC100E196FNR2
Description
IC PROGRAM DELAY 5V ECL 28-PLCC
Manufacturer
ON Semiconductor
Series
100Er
Type
Programmable Delay Chipr
Datasheet

Specifications of MC100E196FNR2

Input
ECL
Output
ECL
Frequency - Max
1GHz
Voltage - Supply
4.2 V ~ 5.7 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Frequency-max
1GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC100E196FNR2
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
MC100E196FNR2G
Manufacturer:
ON Semiconductor
Quantity:
10 000
MC10E196, MC100E196
5V ECL Programmable
Delay Chip
Description
designed primarily for very accurate differential ECL input edge
placement applications.
adjust organized as shown in the logic symbol. The first two delay
elements feature gates that have been modified to have delays
1.25 and 1.5 times the basic gate delay of approximately 80 ps. These
two elements provide the E196 with a digitally-selectable resolution
of approximately 20 ps. The required device delay is selected by the
seven address inputs D[0:6], which are latched on chip by a high signal
on the latch enable (LEN) control.
internal linear ramp for reducing the 20 ps Least Significant Bit (LSB)
minimum resolution still further. The FTUNE input is what
differentiates the E196 from the E195.
PDC’s for increased programmable range. The cascade logic allows
full control of multiple PDC’s, at the expense of only a single added
line to the data bus for each additional PDC, without the need for any
external gating.
this device only. For single-ended input conditions, the unused
differential input is connected to V
V
and V
to 0.5 mA. When not used, V
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 9
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
BB
The MC10E/100E196 is a programmable delay chip (PDC)
The delay section consists of a chain of gates and a linear ramp delay
The FTUNE input takes an analog voltage and applies it to an
An eighth latched input, D7, is provided for cascading multiple
The V
The 100 Series contains temperature compensation.
>1.0 GHz Bandwidth
On Chip Cascade Circuitry
PECL Mode Operating Range: V
with V
NECL Mode Operating Range: V
with V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 1 kV,
2.0 ns Worst Case Delay Range
≈20 ps/Delay Step Resolution
Linear Input for Tighter Resolution
may also rebias AC coupled inputs. When used, decouple V
CC
BB
via a 0.01 mF capacitor and limit current sourcing or sinking
EE
EE
pin, an internally generated voltage supply, is available to
= −4.2 V to −5.7 V
= 0 V
Machine Model; > 75 V
BB
should be left open.
BB
CC
CC
as a switching reference voltage.
= 4.2 V to 5.7 V
= 0 V
1
BB
Meets or Exceeds JEDEC Spec EIA/JESD78 IC
Latchup Test
Moisture Sensitivity Level: Pb = 1; Pb−Free = 3
For Additional Information, see Application Note
AND8003/D
Flammability Rating: UL 94 V−0 @ 1.125 in,
Oxygen Index: 28 to 34
Transistor Count = 425 devices
Pb−Free Packages are Available*
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
xxx
A
WL
YY
WW
G
MARKING DIAGRAM*
http://onsemi.com
MCxxxE196FNG
AWLYYWW
= 10 or 100
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
= Assembly Location
Publication Order Number:
1
FN SUFFIX
CASE 776
PLCC−28
MC10E196/D

Related parts for MC100E196FNR2

MC100E196FNR2 Summary of contents

Page 1

... ESD Protection: Human Body Model; > 1 kV, Machine Model; > *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev switching reference voltage. ...

Page 2

LOGIC DIAGRAM AND PINOUT ASSIGNMENT LEN MC10E196 MC100E196 ...

Page 3

Table 3. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V Sink/Source Operating Temperature ...

Page 4

Table 4. 10E SERIES PECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended) IL ...

Page 5

Table 6. 100E SERIES PECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended) IL ...

Page 6

Table 8. AC CHARACTERISTICS V Symbol Characteristic f Maximum Toggle Frequency MAX t Propagation Delay PLH Tap = 0 PHL Tap = 127 Tap = CASCADE t ...

Page 7

FTUNE VOLTAGE (V) Propagation Delay versus FTUNE Voltage (100E196) The analog FTUNE pin on the E196 device is intended to add more delay in a tunable gate to enhance ...

Page 8

When the SET MAX pin of chip #1 is asserted the D0 and D1 latches will be reset while the rest of the latches will be set. In addition, to maintain monotonicity an additional gate delay is selected in the ...

Page 9

Note: 25 All Taps Selected 20 SET = H, Temp. = 0° −5 −10 −15 −5.5 −5.3 −5.1 −4.9 −4 (V) EE Figure 5. Change in Delay vs. Change in Supply Voltage 4400 ...

Page 10

... ORDERING INFORMATION Device MC10E196FN MC10E196FNG MC10E196FNR2 MC10E196FNR2G MC100E196FN MC100E196FNG MC100E196FNR2 MC100E196FNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D − ...

Page 11

0.010 (0.250) T L− NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT ...

Page 12

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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