SY89874UMG Micrel Inc, SY89874UMG Datasheet - Page 2

• Manufacturer Part Number: SY89874UMG
• Description: IC CLK DVDR ANYDIFF-LVPECL 16MLF
• Manufacturer: Micrel Inc
• Series: Precision Edge®r
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of SY89874UMG

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: CML, HSTL, LVDS, LVPECL
• Output: LVPECL
• Frequency - Max: 2.5GHz
• Voltage - Supply: 2.375 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-MLF®, QFN
• Frequency-max: 2.5GHz
• Clock Ic Type: Clock Driver / Fanout Buffer
• Frequency: 2.5GHz
• No. Of Outputs: 2
• No. Of Multipliers / Dividers: 4
• Supply Current: 50mA
• Supply Voltage Range: 2.375V To 3.63V
• Digital Ic Case: RoHS Compliant
• Function: Clock Divider
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: MLF
• Pin Count: 16
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1437

Micrel, Inc.
Note 1.
M9999-031208
[e-mail] or [phone]
/RESET
PACKAGE/ORDERING INFORMATION
TRUTH TABLE
Pin Number
PIN DESCRIPTION
/Q0
/Q1
0
Q0
Q1
1, 2, 3, 4
16, 15, 5
1
1
1
1
1
(1)
12, 9
7, 14
10
11
13
6
8
(1)
Reset/Disable function is asserted on the next clock input
(IN, /IN) high-to-low transition.
16-Pin MLF
1
2
3
4
16
S2
5
0
1
1
1
1
1
15
6
S1
14
X
X
7
0
0
1
1
®
S0, S1, S2
Pin Name
/DISABLE
VREF-AC
13
/RESET
Q0, /Q0
Q1, /Q1
8
(MLF-16)
IN, /IN
GND
VCC
NC
VT
S0
12
11
10
X
X
0
1
0
1
9
IN
VT
VREF-AC
/IN
Outputs
Reference Clock (pass through)
Reference Clock 2
Reference Clock 4
Reference Clock 8
Reference Clock 16
Q = LOW, /Q = HIGH
Clock Disable
Pin Function
Differential Input: Internal 50 termination resistors to V
differential input. See “Input Interface Applications” section.
Differential Buffered LVPECL Outputs: Divided by 1, 2, 4, 8 or 16. See “Truth Table.”
Unused PECL outputs may be left floating with no impact on jitter performance.
Select Pins: See “Truth Table.” LVTTL/CMOS logic levels. Internal 25k pull-up
resistor. Logic HIGH if left unconnected (divided by 16 mode.) Input threshold is V
No Connect.
LVTTL/CMOS Logic Levels: Internal 25k pull-up resistor. Logic HIGH if left unconnected.
Apply LOW to reset the divider (divided by 2, 4, 8 or 16 mode). Also acts as a synchronous
disable/enable function. The reset and disable function occurs on the next high-to-low
clock input transition. Input threshold is V
Reference Voltage: Equal to V
Decouple the V
Termination Center-Tap: For CML or LVDS inputs, leave this pin floating. Otherwise, see
Figures 2a to 2f “Input Interface Applications” section.
Positive Power Supply: Bypass with 0.1 F//0.01 F low ESR capacitor.
Ground.
Ordering Information
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
Part Number
SY89874UMI
SY89874UMITR
SY89874UMG
SY89874UMGTR
REF-AC
pin with a 0.01 F capacitor. See “Input Interface Applications” section.
(3)
(2)
2
(2, 3)
CC
–1.4V (approx.). Used for AC-coupled applications only.
Package Operating
MLF-16
MLF-16
MLF-16
MLF-16
Type
CC
(1)
/2.
Industrial
Industrial
Industrial
Industrial
Range
T
input. Flexible input accepts any
Pb-Free bar line indicator
Pb-Free bar line indicator
A
= 25 C, DC Electricals only.
874U with
874U with
Package
Marking
874U
874U
Precision Edge
CC
/2.
SY89874U
Pb-Free
Pb-Free
NiPdAu
NiPdAu
Finish
Sn-Pb
Sn-Pb
Lead
®