CY2CC810OXI Cypress Semiconductor Corp, CY2CC810OXI Datasheet - Page 3

• Manufacturer Part Number: CY2CC810OXI
• Description: IC CLK FANOUT BUFFER 1:10 20SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Buffer (Distribution)r

Specifications of CY2CC810OXI

• Package / Case: 20-SSOP
• Number Of Circuits: 1
• Ratio - Input:output: 1:10
• Differential - Input:output: No/No
• Input: LVCMOS
• Output: AVCMOS
• Frequency - Max: 650MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 650MHz
• Number Of Outputs: 10
• Max Input Freq: 650 MHz
• Propagation Delay (max): 3.5 ns @ 3.3V
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 2.375 V
• Maximum Power Dissipation: 750 mW
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2900-5; CY2CC810OXI

Capacitance
Power Supply Characteristics
High-frequency Parametrics
Document #: 38-07056 Rev. *G
Cin
Cout
Δ
I
I
t
D
F
F
F
t
Parameter
Note
Parameter
CCD
C
PU
W
Parameter
1. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
ICC
max(3.3V)
max(2.5V
max(20)
J
functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
Delta I
Supply Current
Dynamic Power Supply
Current
Total Power Supply Current V
Power-up time for all V
Jitter, Deterministic
Maximum frequency
V
Maximum frequency
V
Maximum frequency
V
Maximum frequency
V
Minimum pulse
V
Minimum pulse
V
Input Capacitance
Output Capacitance
DD
DD
DD
DD
DD
DD
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
CC
Description
Description
Quiescent Power
Description
DD
s
50% duty cycle t
The “point to point load circuit”
Output Jitter – Input Jitter
50% duty cycle t
Standard Load Circuit.
50% duty cycle t
The “point to point load circuit”
The “point to point load circuit”
V
20% duty cycle t
The “point to point load circuit”
V
The “point to point load circuit”
V
The “point to point load circuit”
V
V
The “point to point load circuit”
V
V
(I
and V
V
Input toggling 50% Duty Cycle, Outputs Open
Input toggling 50% Duty Cycle, Outputs Open
fL = 40 MHZ
Power-up to reach minimum specified voltage
(power ramp must be monotonic)
(see
IN
IN
IN
IN
OUT
IN
OUT
DD
DD
DD
V
V
= 2.4V/0.0V V
= 3.0V/0.0V V
= 2.4V/0.0V V
= 3.0V/0.0V F = 100 MHz
= 2.4V/0.0V F = 100 MHz
@ V
= Max.
IN
OUT
= Max.
Figure
= 2.0V/0.8V
= 1.7V/0.7V
IN
= 0V
= V
DD
= 0V
= Max. and V
DD
5)
– 0.6V)
W
W
W
W
Test Conditions
OUT
OUT
OUT
(50–50)
(50–50)
(50–50)
(20–80)
Test Conditions
Test Conditions
= 1.7V/0.7V
= 2.3V/0.4V
= 1.7V/0.7V
IN
= V
DD
) – (I
DD
2.5V
3.3V
See
See
See
See
See
See
See
@ V
Figure 5
Figure 7
Figure 7
Figure 7
Figure 3
Figure 7
Figure 3
DD
= Max.
Min.
Min.
Min.
0.05
1
1
Typ.
2.5
6.5
Typ.
Typ.
23
19
Max.
Max.
CY2CC810
Max.
160
650
200
250
200
0.63
500
35
30
50
25
Page 3 of 10
MHz
MHz
MHz
MHz
Unit
Unit
Unit
MHz
mA/
mA
pF
pF
ns
μA
ms
ps
ps
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