ICS83056AGILF IDT, Integrated Device Technology Inc, ICS83056AGILF Datasheet - Page 7

IC MUX 6:1 SGL ENDED 16-TSSOP

ICS83056AGILF

Manufacturer Part Number
ICS83056AGILF
Description
IC MUX 6:1 SGL ENDED 16-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Multiplexerr
Datasheet

Specifications of ICS83056AGILF

Number Of Circuits
1
Ratio - Input:output
6:1
Differential - Input:output
No/No
Input
LVCMOS, LVTTL
Output
LVCMOS, LVTTL
Frequency - Max
250MHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
250MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1108
800-1108-5
800-1108
83056AGILF

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Part Number:
ICS83056AGILF
Manufacturer:
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Quantity:
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IDT
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is called
the dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise power
present in a 1Hz band at a specified offset from the fundamental
frequency to the power value of the fundamental. This ratio is
expressed in decibels (dBm) or a ratio of the power in the 1Hz
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The device
ICS83056I
6:1, SINGLE-ENDED MULTIPLEXER
/ ICS
6:1, SINGLE-ENDED MULTIPLEXER
O
A
FFSET
DDITIVE
F
ROM
C
P
ARRIER
HASE
7
band to the power in the fundamental. When the required offset
is specified, the phase noise is called a dBc value, which simply
means dBm at a specified offset from the fundamental. By
investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
meets the noise floor of what is shown, but can actually be lower.
The phase noise is dependant on the input source and
measurement equipment.
F
J
REQUENCY
ITTER
Additive Phase Jitter
(H
(12kHz to 20MHz) = 0.19ps typical
Z
)
ICS83056AGI REV. B JANUARY 4, 2007
@ 155.52MHz

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