SY58035UMG Micrel Inc, SY58035UMG Datasheet - Page 2

• Manufacturer Part Number: SY58035UMG
• Description: IC BUFFER 1:6FANOUT LVPECL 32MLF
• Manufacturer: Micrel Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: Precision Edge®r

Specifications of SY58035UMG

• Number Of Circuits: 1
• Ratio - Input:output: 2:6
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, PECL
• Output: LVPECL
• Frequency - Max: 5.5GHz
• Voltage - Supply: 2.375 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-MLF®, QFN
• Frequency-max: 5.5GHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 5500MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Package Type: MLF
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/PECL
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1392

Micrel, Inc.
M9999-073010
[e-mail] or [phone]
PACKAGE/ORDERING INFORMATION
VREF-AC0
VREF-AC1
PIN DESCRIPTION
TRUTH TABLE
Pin Number
9, 17, 24, 32
11, 16, 18,
23, 25, 30
29, 28
27, 26
22, 21
20, 19
15, 14
13, 12
VT0
/IN0
VT1
/IN1
IN0
IN1
1, 4
5, 8
2, 6
3, 7
32-Pin MLF
31
10
SEL
1
2
3
4
5
6
7
8
0
1
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
®
Exposed Pad
(MLF-32)
VREF-AC0
VREF-AC1
Pin Name
VT0, VT1
IN0, /IN0
IN1, /IN1
Q0, /Q0,
Q1, /Q1,
Q2, /Q2,
Q3, /Q3,
Q4, /Q4,
Q5, /Q5
GND,
VCC
SEL
NC
24
23
22
21
20
19
18
17
IN0 Input Selected
IN1 Input Selected
GND
VCC
Q2
/Q2
Q3
/Q3
VCC
GND
Pin Function
Differential Input: These input pairs are the differential signal inputs to the device. These
inputs accept AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally
terminates to a VT pin through 50ý. Note that these inputs will default to an indeterminate
state if left open. Please refer to the “Input Interface Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT
pin. The VT0 and VT1 pins provide a center-tap to a termination network for maximum
interface flexibility. See “Input Interface Applications” section for more details.
This single-ended TTL/CMOS-compatible input selects the inputs to the multiplexer. Note
that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic
HIGH state if left open. The MUX select switchover function is asynchronous.
No connect.
Positive Power Supply: Bypass with 0.1µF || 0.01µF low ESR capacitors and place as
close to the VCC pin as possible.
Differential Outputs: These 100K (temperature compensated) LVPECL output pairs are
low skew copies of the selected input. Please refer to the “Truth Table” for details.
Ground: Ground pin and exposed pad must be connected to the same ground plane.
Reference Voltage: These output biases to V
(IN, /IN). Connect V
V
Due to the limited drive capability, the VREF-AC pin is only intended to drive its respective
VT pin.
CC
. See “Input Interface Applications” section. Maximum sink/source current is ±1.5mA.
Ordering Information
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
Part Number
SY58035UMI
SY58035UMITR
SY58035UMG
SY58035UMGTR
REF-AC
(3)
(2)
(2, 3)
2
directly to the VT pin. Bypass with 0.01µF low ESR capacitor to
Package
MLF-32
MLF-32
MLF-32
MLF-32
Type
(1)
Operating
Industrial
Industrial
Industrial
Industrial
Range
CC
–1.2V. It is used for AC-coupling inputs
Pb-Free bar-line indicator
Pb-Free bar-line indicator
SY58035U with
SY58035U with
A
SY58035U
SY58035U
= 25°C, DC electricals only.
Package
Marking
Precision Edge
SY58035U
Pb-Free
Pb-Free
NiPdAu
NiPdAu
Finish
Sn-Pb
Sn-Pb
Lead
®