NB6L11DG ON Semiconductor, NB6L11DG Datasheet - Page 2

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NB6L11DG

Manufacturer Part Number
NB6L11DG
Description
IC BUFFER/XLATOR DIFF 1:2 8-SOIC
Manufacturer
ON Semiconductor
Type
Fanout Buffer (Distribution), Translatorr
Datasheet

Specifications of NB6L11DG

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
CML, LVCMOS, LVDS, LVNECL, LVPECL, LVTTL
Output
ECL
Frequency - Max
6GHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
6GHz
Number Of Outputs
4
Operating Supply Voltage (max)
-3.465/3.465V
Operating Temp Range
-40C to 85C
Propagation Delay Time
0.22ns
Operating Supply Voltage (min)
-2.375/2.375V
Mounting
Surface Mount
Pin Count
8
Operating Supply Voltage (typ)
-2.5/-3.3/2.5/3.3V
Package Type
SOIC N
Input Frequency
>6000MHz
Operating Temperature Classification
Industrial
Max Input Freq
>6000 MHz
Propagation Delay (max)
0.2 ns @ 2.375V to 3.465V
Supply Voltage (max)
- 3.465 V or 3.465 V
Supply Voltage (min)
- 2.375 V or 2.375 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NB6L11DG
NB6L11DGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NB6L11DG
Manufacturer:
ON
Quantity:
109
Part Number:
NB6L11DG
Manufacturer:
ON Semiconductor
Quantity:
1
Á Á Á
Á Á Á
Á Á Á
Table 1. PIN DESCRIPTION
Pin
1
2
3
4
5
6
7
8
Á Á Á Á
Á Á Á Á
Á Á Á Á
Name
V
V
Q0
Q0
Q1
Q1
D
D
CC
EE
Á Á Á Á Á Á Á Á Á
Á Á Á Á Á Á Á Á Á
Á Á Á Á Á Á Á Á Á
LVDS, CML, LVPECL, LVNECL,
LVDS, CML, LVPECL, LVNECL,
Table 2. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
LVCMOS, LVTTL Input
LVCMOS, LVTTL Input
ECL Output
ECL Output
ECL Output
ECL Output
I/O
Q1
Q0
Q1
Q0
Figure 1. Pinout (Top View) and Logic Diagram
1
2
3
4
Characteristics
Default State
http://onsemi.com
Oxygen Index: 28 to 34
HIGH
LOW
Charged Device Model
Human Body Model
Machine Model
2
Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á
Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á
Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á
Non−inverted differential clock/data output 0. Typically termin-
ated with 50 W Resistor to V
Inverted differential clock/data output 0. Typically terminated with
50 W resistor to V
Non−inverted differential clock/data output 1. Typically termin-
ated with 50 W resistor to V
Inverted differential clock/data output 1. Typically terminated with
50 W resistor to V
Negative power supply voltage
Inverted differential clock/data input. Internal 37.5 kW to V
75 kW to V
Non−inverted differential clock/data input. Internal 75 kW to V
and 37.5 kW to V
Positive power supply voltage
TSSOP−8
SOIC−8
R
R
2
2
EE
.
R
R
1
1
Pb Pkg
Level 1
Level 1
EE
TT
TT
UL 94 V−0 @ 0.125 in
.
8
7
6
5
= V
= V
167 Devices
CC
CC
37.5 kW
> 100 V
V
D
D
V
> 2 kV
> 1 kV
Value
75 kW
Description
CC
EE
− 2 V.
TT
− 2 V.
TT
= V
Pb−Free Pkg
= V
CC
Level 1
Level 3
CC
− 2 V.
− 2 V.
CC
and
CC

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