IDT5T9302PGGI8 IDT, Integrated Device Technology Inc, IDT5T9302PGGI8 Datasheet - Page 6

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IDT5T9302PGGI8

Manufacturer Part Number
IDT5T9302PGGI8
Description
IC CLK BUFFER 1:2 LVDS 20-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
TERABUFFER™ IIr
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of IDT5T9302PGGI8

Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
Yes/Yes
Input
CML, eHSTL, HSTL, LVDS, LVEPECL, LVPECL, LVTTL
Output
LVDS
Frequency - Max
450MHz
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
450MHz
Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
450MHz
Output Logic Level
LVDS
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
2.5V
Operating Supply Voltage (max)
2.7V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
5T9302PGGI8
Table 4D. LVDS DC Characteristics
NOTE 1: See Recommended Operating Range table.
NOTE 2: Typical values are at V
AC Electrical Characteristics
Table 5A. HSTL Differential Input AC Characteristics, T
NOTE 1.The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE)
environment. This device meets the V
NOTE 2.A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE)
environment. This device meets the V
NOTE 3.In all cases, input waveform timing is marked at the differential cross-point of the input signals.
NOTE 4.The input signal edge rate of 2V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
IIDT™ LVDS CLOCK BUFFER TERABUFFER™ II
Symbol
V
V
∆V
V
∆V
I
I
Symbol
V
V
D
V
t
OS
OSD
R
IDT5T9302
2.5V LVDS 1:2 CLOCK BUFFER TERABUFFER™ II
OT(+)
OT(–)
OS
DIF
X
THI
H
/ t
OT
OS
F
Parameter
Differential Output Voltage for the
True Binary State
Differential Output Voltage for the
False Binary State
Change in V
Complementary Output States
Output Common Mode Voltage
(Offset Voltage)
Change in V
Complementary Output States
Outputs Short Circuit Current
Differential Outputs Short Circuit Current
Parameter
Input Signal Swing
Differential Input Signal Crossing Point
Duty Cycle
Input Timing Measurement Reference Level
Input Signal Edge Rate
OT
OS
Between
Between
DD
(1)
= 2.5V, +25°C ambient.
(4)
DIF
X
specification under actual use conditions.
(1)
(AC) specification under actual use conditions.
, T
A
= -40°C to 85°C
(2)
(3)
V
OUT+ and
Test Conditions
V
OUT+
A
= -40°C to 85°C
6
V
= V
OUT–
OUT–
= 0V
Minimum
1.125
247
247
Typical
1.2
12
IDT5T9302 REV. A APRIL 29, 2008
6
Crossing Point
(2)
Value
750
50
1
2
Maximum
1.375
454
454
PRELIMINARY
50
50
24
12
Units
V/ns
mV
%
Units
V
V
mV
mV
mV
mV
mA
mA
V

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