IDT49FCT806PY IDT, Integrated Device Technology Inc, IDT49FCT806PY Datasheet - Page 6

• Manufacturer Part Number: IDT49FCT806PY
• Description: IC CLK BUFFER/DVR 1:5 20SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 49FCTr
• Type: Fanout Buffer (Distribution)r

Specifications of IDT49FCT806PY

• Number Of Circuits: 2
• Ratio - Input:output: 1:5
• Differential - Input:output: No/No
• Input: TTL
• Output: CMOS
• Frequency - Max: 166MHz
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Frequency-max: 166MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 49FCT806PY

TEST CIRCUITS AND WAVEFORMS
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t
IDT49FCT806/A
FAST CMOS BUFFER/CLOCK DRIVER
O U T P U T
O U T P U T
IN P U T
G enera to r
N O R M A LL Y
N O R M A LL Y
IN P U T
P ulse
C O N TR O L
O U T PU T
O U T PU T
IN P U T
H IG H
LO W
V
IN
C L O S E D
S W IT C H
S W IT C H
t
Test Circuits for All Outputs
P L H
Enable and Disable Times
O P E N
t
E N A B LE
P L H
R
Pulse Skew - t
t
t
T
P Z L
P Z H
D .U .T .
t
t
S K
Package Delay
V
R
C C
(p) = t
3 .5V
1.5V
1.5V
0 V
V
P H L
O U T
t
-
P H Z
SK(P)
t
D IS A B L E
P L H
50pF
C
t
P H L
F
L
t
≤ 2.5ns; t
P L Z
t
P H L
5 00
50 0
0 .3V
0 .3V
t
F
R
≤ 2.5ns
V
V
1.5V
3V
0V
3.5V
0V
O L
O H
0.8V
2.0V
1.5V
V
1 .5V
V
3 V
0V
7V
O H
O L
1.5 V
V
1.5V
V
3 V
0 V
O H
O L
6
SWITCH POSITION
DEFINITIONS:
C
R
NOTE:
1. Package 1 and Package 2 are same device type and speed grade.
L
T
P A C K A G E 2
P A C K A G E 1
= Load capacitance: includes jig and probe capacitance.
= Termination resistance: should be equal to Z
O U T P U T 2
O U T P U T
O U T P U T 1
O U T P U T
IN P U T
IN P U T
Disable HIGH
Enable HIGH
Disable LOW
Enable LOW
Test
t
S K
Part-to-Part Skew - t
t
t
(p p) = t
P L H 1
S K
t
P L H 1
t
(o ) = t
P L H 2
t
t
P L H 2
S K (p p )
COMMERCIAL TEMPERATURE RANGE
Output Skew
t
S K (o )
P L H 2
P L H 2
-
t
-
P L H 1
t
P L H 1
OUT
o r
SK(PP)
o r
of the Pulse Generator.
t
P H L 2
t
t
P H L 1
P H L 2
t
t
P L H 1
P H L 2
t
Switch
Closed
t
P H L 2
S K (p p )
GND
-
t
-
P H L 1
t
S K (o )
t
P H L 1
V
V
1.5V
1.5V
V
1.5V
V
3V
0V
O H
O L
O H
O L
1 .5V
V
1 .5V
V
V
1 .5V
V
3V
0V
O H
O L
O H
O L