ICS889872AKLFT IDT, Integrated Device Technology Inc, ICS889872AKLFT Datasheet - Page 5

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ICS889872AKLFT

Manufacturer Part Number
ICS889872AKLFT
Description
IC BUFFER/DIVIDER HS 16-VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution), Dividerr
Datasheet

Specifications of ICS889872AKLFT

Number Of Circuits
1
Ratio - Input:output
1:3
Differential - Input:output
Yes/Yes
Input
CML, LVDS, LVPECL
Output
LVDS
Frequency - Max
2GHz
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-VFQFN
Frequency-max
2GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
889872AKLFT
IDT™ / ICS™ LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
Table 4C. Differential DC Characteristics, V
Table 4D. LVDS DC Characteristics, V
AC Electrical Characteristics
Table 5. AC Characteristics, V
All parameters characterized at ≤ 1GHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Specs are design targets.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 6: The cycle-to-cycle jitter on the input will equal the jitter on the output. The part does not add jitter.
ICS889872
DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION
Symbol
R
V
V
V
V
I
V
Symbol
V
V
V
V
∆V
Parameter
f
t
tsk(o)
tsk(pp)
tjit(cc)
tjit(j)
t
t
IN
MAX
PD
RR
R
OUT
OH
OL
IH
IL
IN
DIFF_IN
REF_AC
CCM
IN
/ t
OCM
F
Parameter
Output Voltage Swing
Output High Voltage
Output Low Voltage
Output Common Mode Voltage
Change in Common Mode Voltage
Parameter
Differential Input Resistance
Input High Voltage
Input Low Voltage
Input Voltage Swing
Differential Input Voltage Swing
Input Current
Bias Voltage
Symbol
Output Frequency
Input Frequency
Propagation Delay;
NOTE 1, 2
Output Skew;
NOTE 2, 3, 4
Part-to-Part Skew; NOTE 2, 4, 5
Cycle-to-Cycle Jitter; NOTE 2, 6
Total Jitter; NOTE 2
Reset Recovery Time; NOTE 2
Output Rise/Fall Time; NOTE 2
DD
= 2.5V ± 5%, T
IN-to-Q
QB0-to-QB1
QA-to-QB
DD
(IN, nIN)
(IN, nIN)
(IN, nIN)
(IN, nIN)
= 2.5V ± 5%, T
DD
= 2.5V ± 5%, T
A
= -40°C to 85°C
Test Conditions
Input Swing: ≥400mV
Input Swing: <400mV
Test Conditions
Test Conditions
A
5
= -40°C to 85°C
÷8, ÷16
÷2, ÷4
A
= -40°C to 85°C
Minimum
Minimum
0.925
0.15
1.2
0.3
Minimum
0
600
V
Typical
1.475
DD
Typical
1.35
350
ICS889872AK REV. B JULY 10, 2008
Typical
100
>1.6
– 1.35
750
750
250
150
>2
60
10
7
1
Maximum
Maximum
V
Maximum
DD
50
PRELIMINARY
V
2.8
45
– 0.15
DD
Units
mV
mV
Units
Units
GHz
GHz
V
V
V
mA
ps
ps
ps
ps
ps
ps
ps
ps
ps
V
V
V
V
V

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