ICS85354AK-01LF IDT, Integrated Device Technology Inc, ICS85354AK-01LF Datasheet - Page 10

• Manufacturer Part Number: ICS85354AK-01LF
• Description: IC MUX DUAL 2:1 1:2 16-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS85354AK-01LF

• Number Of Circuits: 2
• Ratio - Input:output: 2:1, 1:2
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL
• Output: LVPECL
• Frequency - Max: 2.5GHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-VFQFN
• Frequency-max: 2.5GHz
• Number Of Clock Inputs: 3
• Output Frequency: 2500MHz
• Output Logic Level: ECL/LVPECL
• Operating Supply Voltage (min): -2.375/2.375V
• Operating Supply Voltage (typ): -2.5/-3.3/2.5/3.3V
• Operating Supply Voltage (max): -3.465/3.465V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/ECL/LVDS/LVPECL
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 85354AK-01LF

W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
I
In/nIn I
For applications not requiring the use of the differential input,
both IN and nIN can be left floating. Though not required, but
for additional protection, a 1k
ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
85354AK-01
R
NPUTS
ECOMMENDATIONS FOR
IRING THE
NPUT
:
:
ONTROL
D
IFFERENTIAL
resistor can be used.
P
INS
:
U
NUSED
I
NPUT TO
F
resistor can be tied from IN to
IGURE
Single Ended Clock Input
I
1. S
NPUT AND
A
A
CCEPT
PPLICATION
INGLE
PRELIMINARY
E
C1
0.1u
O
S
NDED
V_REF
INGLE
UTPUT
CC
S
/2 is
IGNAL
E
P
D
10
NDED
INS
I
IFFERENTIAL
D
of R1 and R2 might need to be adjusted to position the V_REF
in the center of the input voltage swing. For example, if the
input clock swing is only 2.5V and V
1.25V and R2/R1 = 0.609.
O
LVPECL O
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
1K
NFORMATION
R1
1K
R2
RIVING
UTPUTS
VCC
L
EVELS
nINx
D
INx
IFFERENTIAL
:
UTPUT
-
TO
-LVPECL/ECL M
I
NPUT
ICS85354-01
CC
= 3.3V, V_REF should be
D
REV. A JANUARY 16, 2008
UAL
ULTIPLEXER
2:1/1:2