MPC9449AE IDT, Integrated Device Technology Inc, MPC9449AE Datasheet - Page 8

• Manufacturer Part Number: MPC9449AE
• Description: IC CLK FANOUT BUFFER 1:15 52LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Divider, Multiplexer , PLLr

Specifications of MPC9449AE

• Number Of Circuits: 1
• Ratio - Input:output: 3:15
• Differential - Input:output: Yes/No
• Input: LVCMOS, LVPECL
• Output: LVCMOS
• Frequency - Max: 200MHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-LQFP
• Frequency-max: 200MHz
• Number Of Clock Inputs: 3
• Output Frequency: 200MHz
• Output Logic Level: LVCMOS
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: LVCMOS/LVPECL
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDT™ / ICS™ 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER
MPC9449
3.3V/2.5V 1:15 PECL/LVCMOS CLOCK FANOUT BUFFER
PCLK
The pin-to-pin skew is defined as the worst case difference in propagation delay be-
tween any similar delay path within a single device
PCLK
Q
X
Figure 10. Propagation Delay (t
Figure 12. Output Transition Time Test Reference
t
F
Figure 8. Output-to-Output Skew t
t
(LH)
V
PP
t
SK(O)
t
R
t
(HL)
V
CC
PD
0.55
2.4
=3.3 V
) Test Reference
SK(O)
V
CC
V
V
1.8 V
0.6 V
GND
V
GND
V
=2.5 V
CC
CC
CC
CC
V
V
GND
V
÷2
CC
CC
÷2
CMR
÷2
8
CCLK
CCLK
Q
Q
Figure 11. Propagation Delay t
X
X
The variation in cycle time of a signal between adjacent cycles, over a ran-
dom sample of adjacent cycle pairs
Figure 9. Propagation Delay (t
Figure 13. Cycle-to-Cycle Jitter
T
N
t
t
(LH)
(LH)
V
t
PP
SK(P)
Figure 14
T
= t
N+1
PLH
–t
PLH
MPC9449 REV 5 MARCH 14, 2007
t
t
(HL)
(HL)

T
SK(P)
t
PD
(HL)
JIT(CC)
) Test Reference
Test Reference
= |T
N
-T
N+1
|
V
V
GND
V
V
GND
GND
GND
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
÷2
÷2
÷2
÷2