ICS83940AY-02LF IDT, Integrated Device Technology Inc, ICS83940AY-02LF Datasheet - Page 10

IC FANOUT BUFFER 1:18 32-LQFP

ICS83940AY-02LF

Manufacturer Part Number
ICS83940AY-02LF
Description
IC FANOUT BUFFER 1:18 32-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Fanout Buffer (Distribution), Multiplexerr
Series
HiPerClockS™r
Datasheet

Specifications of ICS83940AY-02LF

Number Of Circuits
1
Ratio - Input:output
2:18
Differential - Input:output
Yes/No
Input
HCSL, LVCMOS, LVDS, LVHSTL, LVPECL, LVTTL, SSTL
Output
LVCMOS, LVTTL
Frequency - Max
200MHz
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Frequency-max
200MHz
Number Of Clock Inputs
2
Output Frequency
200MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Package Type
LQFP
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
83940AY-02LF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS83940AY-02LF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS83940AY-02LFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
A
Figure 3 shows an example of ICS83940-02 application sche-
matic. In this example, the device is operated at V
decoupling capacitor should be located as close as possible to
the power pin. The differential input can accept different type of
83940AY-02
PPLICATION
(U1-8)
VCC
3.3V LVPECL
VDDO
C1
0.1u
VCC
S
LVCMOS
Zo = 50 Ohm
Zo = 50 Ohm
CHEMATIC
Q3
(U1-16)
C8 (Option)
C2
0.1u
R3
0.1u
R4
50
(U1-21)
E
43
XAMPLE
C3
0.1u
Zo = 50 Ohm
R5
50
R6
50
(U1-29)
F
IGURE
C4
0.1u
3. A
CC
VDD
=3.3V. The
D
VDDO
VDD=3.3V
VDDO=3.3V
C5
0.1u
PPLICATION SCHEMATIC EXAMPLE
IFFERENTIAL
www.idt.com
ICS83940-02
1
2
3
4
5
6
7
8
U1
10
GND
GND
LVCMOS_CLK
CLK_SEL
CLK
nCLK
VDD
VDDO
input signals. In this example, this input is driven by a 3.3V
LVPECL driver. For the LVCMOS output, a termination example
is shown in this schematic. For more termination approaches,
please refer to the LVCMOS Termination Application Note.
-
TO
-LVCMOS/LVTTL F
VDDO
GND
Q10
Q11
Q6
Q7
Q8
Q9
24
23
22
21
20
19
18
17
R1
R2
L
43
43
ICS83940-02
OW
S
Zo = 50
Zo = 50
ANOUT
KEW
REV. A AUGUST 4, 2010
, 1-
B
TO
UFFER
-18

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