NB6L11MMNR2G ON Semiconductor, NB6L11MMNR2G Datasheet - Page 2

• Manufacturer Part Number: NB6L11MMNR2G
• Description: IC FANOUT BUFFER DIFF CML 16-QFN
• Manufacturer: ON Semiconductor
• Series: ECLinPS MAX™r
• Type: Fanout Buffer (Distribution)r

Specifications of NB6L11MMNR2G

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: CML, LVCMOS, LVDS, LVNECL, LVPECL, LVTTL
• Output: CML
• Frequency - Max: 4GHz
• Voltage - Supply: 2.375 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TFQFN Exposed Pad
• Frequency-max: 4GHz
• Number Of Outputs: 4
• Operating Supply Voltage (max): -3.63/3.63V
• Operating Temp Range: -40C to 85C
• Propagation Delay Time: 0.325ns
• Operating Supply Voltage (min): -2.375/2.375V
• Mounting: Surface Mount
• Pin Count: 16
• Operating Supply Voltage (typ): -2.5/-3.3/2.5/3.3V
• Package Type: QFN EP
• Duty Cycle: 60%
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NB6L11MMNR2G; NB6L11MMNR2GOSTR

1. In the differential configuration when the input termination pins (VTD, VTD) are connected to a common termination voltage or left open, and
2. All V
Table 1. PIN DESCRIPTION
Pin
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
−
if no signal is applied on D/D input, then, the device will be susceptible to self−oscillation.
CC
V
Name
VTD
VTD
REFAC
V
V
V
V
and V
V
V
V
Q1
Q1
Q0
Q0
EP
D
D
CC
CC
CC
CC
EE
EE
EE
EE
pins must be externally connected to a power supply for proper operation.
LVCMOS, LVDS,
LVCMOS, LVDS,
LVTTL Input
LVTTL Input
CML Output
CML Output
CML Output
CML Output
ECL, CML,
ECL, CML,
I/O
−
−
−
−
−
−
−
−
−
−
Internal 50 W Termination Pin for D input.
Noninverted Differential Input. Note 1. Internal 50 W Resistor to Termination Pin, VTD.
Inverted Differential Input. Note 1. Internal 50 W Resistor to Termination Pin, VTD.
Internal 50 W Termination Pin for D input.
Positive Supply Voltage
Output Reference Voltage for direct or capacitor coupled inputs
Negative Supply Voltage
Positive Supply Voltage
Inverted Differential Output. Typically Terminated with 50 W Resistor to V
Noninverted Differential Output. Typically Terminated with 50 W Resistor to V
Inverted Differential Output. Typically Terminated with 50 W Resistor to V
Noninverted Differential Output. Typically Terminated with 50 W Resistor to V
Positive Supply Voltage
Negative Supply Voltage
Negative Supply Voltage
Positive Supply Voltage
The Exposed Pad (EP) on the QFN−16 package bottom is thermally connected to the die for
improved heat transfer out of package. The exposed pad must be attached to a heat−sinking
conduit. The pad is not electrically connected to the die, but is recommended to be electrically
and thermally connected to VEE on the PC board.
VTD
VTD
D
D
Figure 2. Pin Configuration (Top View)
1
2
3
4
V
V
CC
16
http://onsemi.com
CC
5
V
REFAC
V
NB6L11M
15
6
EE
2
V
V
14
7
EE
EE
V
V
13
8
CC
CC
Exposed Pad (EP)
Description
12
11
10
9
Q0
Q0
Q1
Q1
CC
CC
.
.
CC
CC
.
.