NB7L572MNR4G ON Semiconductor, NB7L572MNR4G Datasheet - Page 3

• Manufacturer Part Number: NB7L572MNR4G
• Description: IC CLK/DATA FANOUT/XLATOR 32QFN
• Manufacturer: ON Semiconductor
• Series: GigaComm™r
• Type: Multiplexer , Translatorr

Specifications of NB7L572MNR4G

• Number Of Circuits: 1
• Ratio - Input:output: 4:2
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL
• Output: LVPECL
• Frequency - Max: 8GHz
• Voltage - Supply: 2.375 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TFQFN Exposed Pad
• Frequency-max: 8GHz
• Number Of Clock Inputs: 4
• Mode Of Operation: Differential
• Output Frequency: 7000MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/LVPECL
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. In the differential configuration when the input termination pins (VT0, VT1, VT2, VT3) are connected to a common termination voltage or left
2. All VCC, and GND pins must be externally connected to a power supply for proper operation.
Table 2. PIN DESCRIPTION
10, 13, 16
17, 20, 23
25, 28
29, 32
26, 30
14, 19
21, 22
open, and if no signal is applied on INx / INx input, then the device will be susceptible to self−oscillation.
11, 12
9, 24
1, 4
5, 8
2, 6
Pin
15
18
27
31
3
7
−
VREFAC0
VREFAC1
VREFAC2
VREFAC3
VT0, VT1
VT2, VT3
IN0, IN0
IN1, IN1
IN2, IN2
IN3, IN3
Q0, Q0
Q1, Q1
Name
SEL0
SEL1
GND
VCC
NC
EP
LVTTL/LVCMOS
LVPECL Output
LVPECL, CML,
LVDS Input
Input
I/O
−
−
−
−
Non−inverted, Inverted, Differential Clock or Data Inputs.
Internal 100 W Center−tapped Termination Pin for INx / INx
Input Select pins, default HIGH when left open through a 28k−W pull−up resistor. Input
logic threshold is V
No Connect
Positive Supply Voltage. All V
for correct DC and AC operation.
Inverted, Non−inverted Differential Outputs.
Negative Supply Voltage, connected to Ground
Output Voltage Reference for Capacitor−Coupled Inputs
The Exposed Pad (EP) on the QFN−32 package bottom is thermally connected to the
die for improved heat transfer out of package. The exposed pad must be attached to a
heat−sinking conduit. The pad is electrically connected to the die, and must be elec-
trically connected to GND.
http://onsemi.com
3
CC
/2. See Select Function, Table 1.
CC
pins must be connected to the positive power supply
Description