NB6N14SMNG ON Semiconductor, NB6N14SMNG Datasheet - Page 4

IC CLK/DATA RCVR DIFF 1:4 16-QFN

NB6N14SMNG

Manufacturer Part Number
NB6N14SMNG
Description
IC CLK/DATA RCVR DIFF 1:4 16-QFN
Manufacturer
ON Semiconductor
Series
AnyLevel™ ECLinPS MAX™r
Type
Fanout Buffer (Distribution), Translatorr
Datasheet

Specifications of NB6N14SMNG

Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
Yes/Yes
Input
CML, LVDS, LVPECL
Output
LVDS
Frequency - Max
2GHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TFQFN Exposed Pad
Frequency-max
2GHz
Number Of Outputs
8
Max Input Freq
2000 MHz (Min)
Propagation Delay (max)
0.6 ns @ 3V to 3.6V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NB6N14SMNG
NB6N14SMNGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NB6N14SMNG
Manufacturer:
ON
Quantity:
760
Part Number:
NB6N14SMNG
Manufacturer:
ON
Quantity:
298
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
5. LVDS outputs require 100 W receiver termination resistor between differential pair. See Figure 17.
6. V
7. V
8. V
9. Input termination pins open, D/D at the DC level within V
10. Parameter guaranteed by design verification not tested in production.
11. V
Table 5. DC CHARACTERISTICS
DIFFERENTIAL INPUTS DRIVEN SINGLE−ENDED (Figures 14, 15, 19, and 21)
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 10, 11, 12, 13, 20, and 22)
LVDS OUTPUTS (Note 5)
LVTTL/LVCMOS INPUTS
I
V
V
V
V
V
V
V
V
R
V
DV
V
DV
V
V
V
V
I
I
Symbol
CC
IH
IL
th
IH
IL
REF_AC
IHD
ILD
CMR
ID
TIN
OD
OS
OH
OL
IH
IL
OD
OS
OH
OL
th
REF_AC
is applied to the complementary input when operating in single−ended mode.
max = V
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
max = V
used to rebias capacitor−coupled inputs only (see Figures 14 and 15).
Power Supply Current (Note 9)
Input Threshold Reference Voltage Range (Note 8)
Single−ended Input HIGH Voltage
Single−ended Input LOW Voltage
Reference Output Voltage (Note 11)
Differential Input HIGH Voltage
Differential Input LOW Voltage
Input Common Mode Range (Differential Configuration)
Differential Input Voltage (V
Internal Input Termination Resistor
Differential Output Voltage
Change in Magnitude of V
(Note 10)
Offset Voltage (Figure 18)
Change in Magnitude of V
(Note 10)
Output HIGH Voltage (Note 6)
Output LOW Voltage (Note 7)
Input HIGH Voltage (Note 7, 8)
Input LOW Voltage (Note 7, 8)
Input HIGH Current
Input LOW Current
OS
OS
min − ½ V
max + ½ V
OD
OD
max.
max.
OD
OS
V
IHD
Characteristic
CC
for Complementary Output States
for Complementary Output States
− V
= 3.0 V to 3.6 V, GND = 0 V, T
ILD
)
http://onsemi.com
CMR
and output pins loaded with R
4
A
= −40°C to +85°C
V
GND +100
GND + 50
V
CC
th
GND
GND
GND
−150
−150
1125
Min
100
100
250
900
2.0
− 1.600
40
+ 100
0
0
L
= 100 W across differential.
V
CC
1425
1075
Typ
65
− 1.425
50
1
1
V
V
V
V
CC
V
CC
CC
th
CC
1375
1600
Max
V
V
V
V
100
450
150
150
0.8
− 1.300
60
25
25
− 100
CC
CC
CC
CC
− 100
− 100
− 50
Unit
mA
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
V
W
V
V

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