MC10H641FNG ON Semiconductor, MC10H641FNG Datasheet - Page 5
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MC10H641FNG
Manufacturer Part Number
MC10H641FNG
Description
IC CLOCK DRV 1:9 PECL-TTL 28PLCC
Manufacturer
ON Semiconductor
Type
Fanout Buffer (Distribution)r
Datasheet
1.MC100H641FNR2G.pdf
(10 pages)
Specifications of MC10H641FNG
Number Of Circuits
1
Ratio - Input:output
1:9
Differential - Input:output
Yes/Yes
Input
PECL
Output
TTL
Frequency - Max
65MHz
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Frequency-max
65MHz
Logic Type
Latched Translator
Logic Family
ECL
Translation
PECL to TTL
Propagation Delay Time
6.27 ns
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Logical Function
Latched Translator
Technology
ECL
High Level Output Current
-15mA
Low Level Output Current
24mA
Operating Supply Voltage (typ)
5V
Package Type
PLCC
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Abs. Propagation Delay Time
7ns
Mounting
Surface Mount
Pin Count
28
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC10H641FNG
Manufacturer:
ON Semiconductor
Quantity:
10 000
skew clock distribution applications. In order to optimize
the device for this application special considerations are
necessary in the determining of the part−to−part skew
specification limits. Older standard logic devices are
specified with relatively slack limits so that the device can
be guaranteed over a wide range of potential environmental
conditions. This range of conditions represented all of the
potential applications in which the device could be used. The
result was a specification limit that in the vast majority of
cases was extremely conservative and thus did not allow for
an optimum system design. For non−critical skew designs
this practice is acceptable, however as the clock speeds of
systems increase overly conservative specification limits
can kill a design.
information provided in this data sheet to tailor a
part−to−part skew specification limit to their application.
The skew determination process may appear somewhat
tedious and time consuming, however if the utmost in
performance is required this procedure is necessary. For
applications which do not require this level of skew
performance a generic part−to−part skew limit of 2.5 ns can
be used. This limit is good for the entire ambient temperature
range, the guaranteed V
guaranteed operating frequency range.
Temperature Dependence
AC parameters are specified for a junction temperature
rather than the usual ambient temperature. Because very few
designs will actually utilize the entire commercial
temperature range of a device a tighter propagation delay
window can be established given the smaller temperature
range. Because the junction temperature and not the ambient
temperature is what affects the performance of the device the
parameter limits are specified for junction temperature. In
addition the relationship between the ambient and junction
temperature will vary depending on the frequency, load and
board environment of the application. Since these factors are
all under the control of the user it is impossible to provide
specification limits for every possible application.
Therefore a baseline specification was established for
specific junction temperatures and the information that
follows will allow these to be tailored to specific
applications.
measure directly, the first requirement is to be able to
“translate” from ambient to junction temperatures. The
standard method of doing this is to use the power dissipation
of the device and the thermal resistance of the package. For
a TTL output device the power dissipation will be a function
of the load capacitance and the frequency of the output. The
total power dissipation of a device can be described by the
following equation:
The H641 has been designed to meet the needs of very low
The following will discuss how users can use the
A unique characteristic of the H641 data sheet is that the
Since the junction temperature of a device is difficult to
CC
(V
T
, V
Determining Skew for a Specific Application
E
) range and the
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5
no load capacitance on the output. Using this graph and the
information specific to the application a user can determine
the power dissipation of the H641.
the PLCC−28 under various air flow conditions. By reading
the thermal resistance from the graph and multiplying by the
power dissipation calculated above the junction temperature
increase above ambient of the device can be calculated.
applying it to Figure 3 allows the user to determine the
P
where:
Figure 1 plots the I
Figure 2 illustrates the thermal resistance (in °C/W) for
Finally taking this value for junction temperature and
D
V
V
f = Output Frequency
C
I
(watts) = I
CC
L
S
S
70
60
50
40
30
= Output Voltage Swing = 3.0 V
* V
= Load Capacitance
5
4
3
2
1
0
= I
0
0
CC
EE
Figure 1. I
Figure 2. j
+ I
10
* f * C
CC
CCH
200
(no load) * V
CC
20
L
CC
versus Frequency of the H641 with
* # Outputs
FREQUENCY (MHz)
JA
AIRFLOW (LFPM)
30
versus f (No Load)
400
versus Air Flow
40
CC
600
+
50
60
800
70
1000
80