ICS853L022AMLF IDT, Integrated Device Technology Inc, ICS853L022AMLF Datasheet - Page 7

• Manufacturer Part Number: ICS853L022AMLF
• Description: IC TRANSLATOR LVPECL 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Translatorr

Specifications of ICS853L022AMLF

• Number Of Circuits: 2
• Ratio - Input:output: 1:2
• Differential - Input:output: No/Yes
• Input: LVCMOS, LVTTL
• Output: LVPECL
• Frequency - Max: 350MHz
• Voltage - Supply: 3 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 350MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 853L022AMLF

This section provides information on power dissipation and junction temperature for the ICS853L022.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853L022 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
moderate air flow of 1 meters per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 4A below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
T
853L022AG
ABLE
ABLE
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.176W * 90.5°C/W = 100.9°C. This is below the limit of 125°C.
Multi-Layer PCB, JEDEC Standard Test Boards
JA
A
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
= Ambient Temperature
4A. T
4B. T
= Junction-to-Ambient Thermal Resistance
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 30.94mW = 61.88mW
Total Power
HERMAL
HERMAL
Integrated
Circuit
Systems, Inc.
MAX
R
R
_MAX
ESISTANCE
ESISTANCE
MAX
= V
= 30.94mW/Loaded Output pair
(3.8V, with all outputs switching) = 114mW + 61.88mW = 175.88mW
CC_MAX
* I
JA
EE_MAX
JA
FOR
FOR
JA
P
CC
JA
= 3.8V * 30mA = 114mW
JA
by Velocity (Linear Feet per Minute)
8 L
= 3.8V, which gives worst case results.
8-
www.icst.com/products/hiperclocks.html
* Pd_total + T
OWER
by Velocity (Meters per Second)
PIN
EAD
TSSOP, F
SOIC
C
A
ONSIDERATIONS
ORCED
7
101.7°C/W
153.3°C/W
112.7°C/W
D
UAL
0
C
0
ONVECTION
TM
LVCMOS / LVTTL-
devices is 125°C.
128.5°C/W
103.3°C/W
90.5°C/W
3.3V LVPECL T
200
1
JA
must be used. Assuming a
ICS853L022
115.5°C/W
89.8°C/W
97.1°C/W
TO
500
2
REV. A OCTOBER 29, 2008
-D
IFFERENTIAL
RANSLATOR