LMX2531LQ1778E/NOPB National Semiconductor, LMX2531LQ1778E/NOPB Datasheet - Page 22

IC PLL FREQ SYNTH W/VCO 36-LLP

LMX2531LQ1778E/NOPB

Manufacturer Part Number
LMX2531LQ1778E/NOPB
Description
IC PLL FREQ SYNTH W/VCO 36-LLP
Manufacturer
National Semiconductor
Series
PowerWise®r
Type
Clock/Frequency Synthesizer (RF)r
Datasheet

Specifications of LMX2531LQ1778E/NOPB

Pll
Yes
Input
Clock
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
2:2
Differential - Input:output
No/No
Frequency - Max
1.84GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.8 V ~ 3.2 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-LLP
Frequency-max
1.84GHz
Number Of Elements
1
Supply Current
46mA
Pll Input Freq (min)
5MHz
Pll Input Freq (max)
80MHz
Operating Supply Voltage (typ)
3V
Operating Temp Range
-40C to 85C
Package Type
LLP EP
Output Frequency Range
1726 to 1840MHz
Operating Supply Voltage (min)
2.8V
Operating Supply Voltage (max)
3.2V
Operating Temperature Classification
Industrial
Pin Count
36
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMX2531LQ1778ETR
www.national.com
2.1 REGISTER R0
The action of programming the R0 register activates a frequency calibration routine for the VCO. This calibration is necessary to
get the VCO to center the tuning voltage for optimal performance. If the temperature drifts considerably, then the PLL should stay
in lock, provided that the temperature drift specification is not violated.
2.1.1 NUM[10:0] and NUM[21:12] -- Fractional Numerator
The NUM word is split between the R0 register and R1 register. The Numerator bits determine the fractional numerator for the
delta sigma PLL. This value can go from 0 to 4095 when the FDM bit (R3[22]) is 0 (the other bits in this register are ignored), or 0
to 4194303 when the FDM bit is 1.
Note that there are restrictions on the fractional numerator value depending on the R divider value if it is 16 or 32.
2.1.2 N[7:0] and N[10:8]
The N counter is 11 bits. 8 of these bits are located in the R0 register, and the remaining 3 (MSB bits) are located in the R1 register.
The LMX2531 consists of an A, B, and C counter, which work in conjunction with the 16/17/20/21 prescaler in order to form the
final N counter value.
N Value
Numerator
Fractional
2039
4194303
<55
409503
55
...
4096
...
...
0
0
1
0
1
0
1
0
1
0
1
N[10:8]
0
1
0
1
0
1
0
1
0
1
NUM[21:12]
0
1
0
1
0
1
0
1
0
1
C
0
1
0
1
0
1
Values less than 55 are prohibited.
0
1
0
1
0
1
0
1
0
1
22
0
1
0
1
0
1
1
1
1
1
0
1
0
1
0
1
0
1
1
1
N[7:0]
0
1
0
1
0
1
0
1
0
0
NUM[11:0]
0
1
0
1
B
0
1
0
1
1
1
0
1
0
1
0
1
0
1
1
1
0
1
0
1
A
0
1
0
1
1
1
0
1
0
1

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