MB88155PFT-G-100-JNE1 Fujitsu Semiconductor America Inc, MB88155PFT-G-100-JNE1 Datasheet - Page 17
![IC SSCG EMI RED 8-TSSOP](/photos/6/55/65523/mb88155pft-g-100-jne1_sml.jpg)
MB88155PFT-G-100-JNE1
Manufacturer Part Number
MB88155PFT-G-100-JNE1
Description
IC SSCG EMI RED 8-TSSOP
Manufacturer
Fujitsu Semiconductor America Inc
Type
Fanout Distribution, Spread Spectrum Clock Generatorr
Datasheet
1.MB88155PFT-G-100-JNE1.pdf
(24 pages)
Specifications of MB88155PFT-G-100-JNE1
Pll
Yes with Bypass
Input
CMOS
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
25MHz
Divider/multiplier
No/Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Frequency-max
25MHz
For Use With
865-1035 - BOARD EVALUATION FOR MB88155
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1042
(Continued)
If the ENS pin is used for modulation enable control during normal operation, the set clock signal is output from the
CKOUT pin at most the lock-up time “t
Note : The wait time for the clock signal output from the CKOUT pin to become stable is required after the IC is
released from power-down mode by the XPD pin or after another pin’s setting is changed. During the period
until the output clock signal becomes stable, neither of the output frequency, output clock duty cycle, mod-
ulation period, and cycle-cycle jitter characteristic cannot be guaranteed. It is therefore advisable to take
action, such as cancelling a device reset at the stage after the lock-up time has passed.
XIN
ENS
CKOUT
V
IH
t
LK
(Lock-up time)
LK
” after the level at the ENS pin is determined.
t
LK
V
IL
(Lock-up time)
MB88155
17