ICS343MP IDT, Integrated Device Technology Inc, ICS343MP Datasheet - Page 3

• Manufacturer Part Number: ICS343MP
• Description: IC VERSACLOCK SYNTHESIZER 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock/Frequency Synthesizerr

Specifications of ICS343MP

• Pll: Yes
• Input: Clock, Crystal
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: No/No
• Frequency - Max: 200MHz
• Divider/multiplier: No/Yes
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 343MP

OutputFreq
be kept as short as possible, as should the PCB trace to the
ground via. Distance of the ferrite bead and bulk decoupling
from the device is less critical.
2) The external crystal should be mounted just next to the
device with short traces. The X1 and X2 traces should not
be routed next to each other with minimum spaces, instead
they should be separated and away from other traces.
3) To minimize EMI, the 33 series termination resistor (if
needed) should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers. Other signal traces should be routed away from the
ICS343. This includes signal traces just underneath the
device, or on layers adjacent to the ground plane layer used
by the device.
ICS343 Configuration Capabilities
The architecture of the ICS343 allows the user to easily
configure the device to a wide range of output frequencies,
for a given input reference frequency.
The frequency multiplier PLL provides a high degree of
precision. The M/N values (the multiplier/divide values
available to generate the target VCO frequency) can be set
within the range of M = 1 to 2048 and N = 1 to 1024.
The ICS343 also provides separate output divide values,
from 2 through 20, to allow the two output clock banks to
support widely differing frequency values from the same
PLL.
Each output frequency can be represented as:
IDT VersaClock Software
IDT applies years of PLL optimization experience into a
user-friendly software that accepts the user’s target
reference clock and output frequencies and generates the
lowest jitter, lowest power configuration, with only a press of
a button. The user does not need to have prior PLL
experience or determine the optimal VCO frequency to
support multiple output frequencies.
IDT™ / ICS™ FIELD PROGRAMMABLE TRIPLE OUTPUT SS VERSACLOCK SYNTHESIZER 3
ICS343
FIELD PROGRAMMABLE TRIPLE OUTPUT SS VERSACLOCK SYNTHESIZER
=
------------------------------------- -
OutputDivide
REFFreq
M
---- -
N
VersaClock software quickly evaluates accessible VCO
frequencies with available output divide values and provides
an easy to understand, bar code rating for the target output
frequencies. The user may evaluate output accuracy,
performance trade-off scenarios in seconds.
Spread Spectrum Modulation
The ICS343 utilizes frequency modulation (FM) to distribute
energy over a range of frequencies. By modulating the
output clock frequencies, the device effectively lowers
energy across a broader range of frequencies; thus,
lowering a system’s electro-magnetic interference (EMI).
The modulation rate is the time from transitioning from a
minimum frequency to a maximum frequency and then back
to the minimum.
Spread Spectrum Modulation can be applied as either
“center spread” or “down spread”. During center spread
modulation, the deviation from the target frequency is equal
in the positive and negative directions. The effective
average frequency is equal to the target frequency. In
applications where the clock is driving a component with a
maximum frequency rating, down spread should be applied.
In this case, the maximum frequency, including modulation,
is the target frequency. The effective average frequency is
less than the target frequency.
The ICS343 operates in both center spread and down
spread modes. For center spread, the frequency can be
modulated between +/- 0.125% to +/-2.0%. For down
spread, the frequency can be modulated between -0.25% to
-4.0%.
Both output frequency banks will utilize identical spread
spectrum percentage deviations and modulation rates, if a
common VCO frequency can be identified.
Spread Spectrum Modulation Rate
The spread spectrum modulation frequency applied to the
output clock frequency may occur at a variety of rates. For
applications requiring the driving of “down-circuit” PLLs,
Zero Delay Buffers, or those adhering to PCI standards, the
spread spectrum modulation rate should be set to 30-33
kHz. For other applications, a 120 kHz modulation option is
available.
EPROM CLOCK SYNTHESIZER
ICS343
REV L 051310