ICS8633AF-01LFT IDT, Integrated Device Technology Inc, ICS8633AF-01LFT Datasheet - Page 7

• Manufacturer Part Number: ICS8633AF-01LFT
• Description: IC BUFFER ZD 1-3 LVPECL 28-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Distribution, Multiplexer , Zero Delay Bufferr

Specifications of ICS8633AF-01LFT

• Pll: Yes with Bypass
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:3
• Differential - Input:output: Yes/Yes
• Frequency - Max: 700MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 700MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8633AF-01LFT

F
8633AF-01
R
I
CLK/nCLK I
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required,
but for additional protection, a 1k
CLK to ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
interface examples for the CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
NPUTS
IGURE
IGURE
PP
ECOMMENDATIONS FOR
IFFERENTIAL
and V
3.3V
3C. CLK/nCLK I
3A. CLK/nCLK I
:
1.8V
CMR
LVPECL
ONTROL
NPUT
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
LVHSTL D
input requirements. Figures 3A to 3D show
:
C
resistor can be used.
Zo = 50 Ohm
Zo = 50 Ohm
P
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
INS
:
RIVER
I
NPUT
NPUT
NPUT
U
NUSED
RIVER
R1
50
D
D
3.3V
R3
125
I
R1
84
RIVEN BY
RIVEN BY
NTERFACE
SWING
resistor can be tied from
R2
50
R4
125
I
R2
84
NPUT AND
and V
CLK
nCLK
CLK
nCLK
3.3V
OH
3.3V
HiPerClockS
Input
must meet the
HiPerClockS
Input
O
UTPUT
www.idt.com
P
7
INS
F
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 3A, the input termination applies for LVHSTL
drivers. If you are using an LVHSTL driver from another
vendor, use their termination recommendation.
F
O
LVPECL O
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
IGURE
IGURE
UTPUTS
1-
3.3V
3.3V
3D. CLK/nCLK I
3B. CLK/nCLK I
TO
LVDS_Driv er
LVPECL
-3 D
:
UTPUT
3.3V LVPECL D
3.3V LVDS D
Zo = 50 Ohm
Zo = 50 Ohm
IFFERENTIAL
Zo = 50 Ohm
Zo = 50 Ohm
NPUT
NPUT
RIVER
R1
50
RIVER
D
R3
50
D
Z
RIVEN BY
-
RIVEN BY
ERO
TO
R2
50
ICS8633-01
R1
100
-3.3V LVPECL
CLK
nCLK
D
3.3V
ELAY
HiPerClockS
REV. B AUGUST 2, 2010
Input
CLK
nCLK
3.3V
B
Receiv er
UFFER