IDT5V993A-2QG IDT, Integrated Device Technology Inc, IDT5V993A-2QG Datasheet - Page 3

• Manufacturer Part Number: IDT5V993A-2QG
• Description: IC CLK DVR PLL 3.3V PROGR 28QSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: TurboClock™r
• Type: PLL Clock Driverr

Specifications of IDT5V993A-2QG

• Pll: Yes with Bypass
• Input: LVTTL
• Output: LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 1:8
• Differential - Input:output: No/No
• Frequency - Max: 85MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• Frequency-max: 85MHz
• Number Of Elements: 1
• Supply Current: 76mA
• Pll Input Freq (min): 3.75MHz
• Pll Input Freq (max): 85MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: QSOP
• Output Frequency Range: 3.75 to 85MHz
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Pin Count: 28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 5V993A-2QG

PLL PROGRAMMABLE SKEW RANGE AND RESOLUTION TABLE
NOTES:
1. The device may be operated outside recommended frequency ranges without damage, but functional operation is not guaranteed. Selecting the appropriate FS value based on
2. The level to be set on FS is determined by the nominal operating frequency of the VCO and Time Unit Generator. The VCO frequency always appears at 1Q
3. Skew adjustment range assumes that a zero skew output is used for feedback. If a skewed Q output is used for feedback, then adjustment range will be greater. For example
CONTROL SUMMARY TABLE FOR FEEDBACK SIGNALS
NOTE:
1. LL disables outputs if TEST = MID and GND/sOE = HIGH.
EXTERNAL FEEDBACK
with regard to skew adjustment. The FB signal is compared with the
input REF signal at the phase detector in order to drive the VCO. Phase
differences cause the VCO of the PLL to adjust upwards or downwards
accordingly.
IDT5V993A
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
Timing Unit Calculation (t
VCO Frequency Range (F
Skew Adjustment Range
Max Adjustment:
Example 1, F
Example 2, F
Example 3, F
Example 4, F
Example 5, F
Example 6, F
input frequency range allows the PLL to operate in its ‘sweet spot’ where jitter is lowest.
higher outputs when they are operated in their undivided modes. The frequency appearing at the REF and FB inputs will be the same as the VCO when the output connected
to FB is undivided. The frequency of the REF and FB inputs will be 1/2 or 1/4 the VCO frequency when the part is configured for a frequency multiplication by using a divided
output as the FB input.
if a 4t
applies to output pairs 3 and 4 where ± 6t
By providing external feedback, the IDT5V993A gives users flexibility
U
skewed output is used for feedback, all other outputs will be skewed –4t
NOM
NOM
NOM
NOM
NOM
NOM
= 15MHz
= 25MHz
= 30MHz
= 40MHz
= 50MHz
= 80MHz
nF1:0
LL
M M
M H
H M
H H
LM
ML
LH
HL
(1)
(3)
U
)
NOM
)
(1,2)
U
skew adjustment is possible and at the lowest F
1/(44 x F
15 to 35MHz
FS = LOW
t
t
t
U
U
U
±9.09ns
±14%
= 1.52ns
= 0.91ns
= 0.76ns
±49°
—
—
—
NOM
)
Skew (Pair #1, #2)
U
Zero Skew
in addition to whatever skew value is programmed for those outputs. ‘Max adjustment’ range
–4t
–3t
–2t
–1t
1t
2t
3t
4t
3
U
U
U
U
U
U
U
U
phase detector. The loop filter transfer function has been chosen to
provide minimal jitter (or frequency variation) while still providing accu-
rate responses to input frequency changes.
An internal loop filter moderates the response of the VCO to the
1/(26 x F
25 to 60MHz
t
t
t
t
NOM
FS = MID
U
U
U
U
±9.23ns
±23%
= 1.54ns
= 1.28ns
= 0.96ns
= 0.77ns
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
±83°
—
—
value.
NOM
)
1/(16 x F
40 to 85 MHz
FS = HIGH
t
t
t
U
U
U
±9.38ns
±135°
±37%
= 1.56ns
= 1.25ns
= 0.78ns
—
—
—
NOM
)
Skew (Pair #3)
Divide by 2
Divide by 4
Zero Skew
–6t
–4t
–2t
2t
4t
6t
U
U
U
% of Cycle Time
U
U
U
Phase Degrees
Comments
ns
1:0
, 2Q
1:0
, and the