CY25200FZXC Cypress Semiconductor Corp, CY25200FZXC Datasheet

IC CLOCK GEN PROG 3.3V 16-TSSOP

CY25200FZXC

Manufacturer Part Number
CY25200FZXC
Description
IC CLOCK GEN PROG 3.3V 16-TSSOP
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Distribution, Spread Spectrum Clock Generatorr
Datasheet

Specifications of CY25200FZXC

Number Of Circuits
1
Package / Case
16-TSSOP
Pll
Yes with Bypass
Input
Clock, Crystal
Output
VDDL
Ratio - Input:output
1:6
Differential - Input:output
No/No
Frequency - Max
200MHz
Divider/multiplier
Yes/No
Voltage - Supply
2.375 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Frequency-max
200MHz
Maximum Input Frequency
166 MHz
Minimum Input Frequency
8 MHz
Output Frequency Range
3 MHz to 200 MHz
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
428-1918 - KIT DEV FTG PROGRAMMING KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY25200FZXC
Manufacturer:
CY
Quantity:
7
Features
Cypress Semiconductor Corporation
Document #: 38-07633 Rev. *F
Logic Block Diagram
Wide Operating Output (SSCLK) Frequency Range
Programmable Spread Spectrum with Nominal 31.5 kHz
modulation Frequency
Center Spread: ±0.25% to ±2.5%
Down Spread: –0.5% to –5.0%
Input Frequency Range
Integrated Phase-Locked Loop (PLL)
Programmable Crystal Load Capacitor Tuning Array
Low Cycle-to-Cycle Jitter
3.3V Operation with 2.5V Output Clock Drive Option
Spread Spectrum On and Off Function
Power Down or Output Enable Function
Output Frequency Select Option
Field-Programmable
Package: 16 Pin TSSOP
3 to 200 MHz
External crystal: 8 to 30 MHz fundamental crystals
External reference: 8 to 166 MHz clock
XIN/CLKIN
XOUT
C
XOUT
16
1
C
OSC.
XIN
Q
Φ
VDD
2
P
AVDD
198 Champion Court
VCO
3
PLL
AVSS
5
VSS
Clock Generator for EMI Reduction
13
VDDL
Programmable Spread Spectrum
11
Description
The CY25200 is a programmable clock generator with spread
spectrum capability. Spread spectrum modulates the output
clock frequency over a small range, spreading the energy and
reducing the energy peak. This is a powerful technique to reduce
EMI in a variety of applications.
It uses either an external reference clock or a crystal for an input.
It also uses a PLL to generate a spread spectrum output clock
that can be a different frequency than the input. Up to six output
clocks are available and up to two of them can be REFCLKs
(copies of the input clock, without spread).
The CY25200 is highly configurable. Programmable variables
include the input and output frequencies, spread percentage,
center spread or down spread, and control pin functions. The
oscillator pin capacitance can also be programmed to match the
load capacitance requirement (C
need for external capacitors.
Available features include Output Enable, Power Down, Spread
On/Off, Frequency Select, and the option to power some output
clocks at 2.5V.
Cypress’ web-based CyberClocks Online software is used to
configure the device. Programmability enables fast prototyping,
which is particularly useful when doing EMC testing and deter-
mining the optimal spread settings.
Divider
Bank 2
Divider
Bank 1
VSSL
6
CP0
4
San Jose
CP1
10
Output
Select
Matrix
,
CA 95134-1709
L
)of the crystal, eliminating the
Revised September 01, 2009
14
15
7
12
8
9
SSCLK2
SSCLK1
SSCLK3
SSCLK4
SSCLK5/REFOUT/CP2
SSCLK6/REFOUT/CP3
CY25200
408-943-2600
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Related parts for CY25200FZXC

CY25200FZXC Summary of contents

Page 1

... OSC. XOUT XOUT XIN Cypress Semiconductor Corporation Document #: 38-07633 Rev. *F Programmable Spread Spectrum Clock Generator for EMI Reduction Description The CY25200 is a programmable clock generator with spread spectrum capability. Spread spectrum modulates the output clock frequency over a small range, spreading the energy and reducing the energy peak ...

Page 2

Pin Configuration General Description The CY25200 is a Spread Spectrum Clock Generator (SSCG) IC used to reduce Electro Magnetic Interference (EMI) found in today’s high speed digital electronic systems. The device uses a Cypress proprietary Phase-Locked Loop (PLL) and Spread ...

Page 3

Table 2. Fixed Function Pins Pin Function Output Clock Frequency Pin Name SSCLK[1:6] Pin 12, 14, 15 Units MHz Program Value USER SPECIFIED CLKSEL = 0 Program Value USER SPECIFIED CLKSEL = 1 Table 3. Multi-Function Pins ...

Page 4

Product Functions Control Pins (CP0, CP1, CP2 and CP3) Four control signals are available through programming of pins 4, 10, 14, and 15. CP0 (pin 4) and CP1 (pin10) are specifically designed to function as control pins. However, pins 14 ...

Page 5

Spread Percentage (SSCLK1 to SSCLK6 Outputs) The SSCLK frequency is programmed to a percentage value from ±0.25% to ±2.5% for center spread and from –0.5% to –5.0% down spread. The granularity is 0.25%. Table 4. Using Clock Select, CLKSEL Control ...

Page 6

Switching Waveforms Figure 5. Output Rise and Fall Time (SSCLK and REFCLK) OUTPUT Tr Output Rise time (Tr Output Fall time (Tf Refer to AC Electrical Characteristics table for SR (Slew Rate) ...

Page 7

Informational Graphs The informational graphs are meant to convey the typical performance levels. No performance specifications is implied or guaranteed. 172.5 171.5 Spread Spectrum Profile: Fnom=166MHz, Fmod=30kHz, Spread%= -4% 170.5 169.5 168.5 167.5 166.5 165.5 164.5 163.5 162.5 161.5 160.5 ...

Page 8

Absolute Maximum Rating Supply Voltage (VDD)....................................... –0.5 to +7.0V DC Input Voltage ......................................–0. Storage Temperature (non-condensing) ..... –55°C to +125°C Junction Temperature ................................ –40°C to +125°C Recommended Crystal Specifications Parameter Description F Nominal Crystal Frequency NOM C Nominal ...

Page 9

AC Electrical Specifications Parameter Description DC Output Duty Cycle Output Duty Cycle SR1 Rising/Falling Edge Slew Rate SSCLK1/2/3/4 < 100 MHz, V Rising/Falling Edge Slew Rate SSCLK1/2/3/4 ≥ 100 MHz, V SR2 SR3 Rising/Falling Edge Slew Rate SSCLK1/2/3/4 < 100 ...

Page 10

... Ordering Code [6] CY25200-ZXCxxxw 16-Pin TSSOP (Pb-free) [6] CY25200-ZXCxxxwT 16-Pin TSSOP – Tape and Reel (Pb-free) [6] CY25200FZXC 16-Pin TSSOP (Pb-free) CY25200K-ZXCxxxw 16-Pin TSSOP (Pb-free) CY25200K-ZXCxxxwT 16-Pin TSSOP – Tape and Reel (Pb-free) CY25200KFZXC 16-Pin TSSOP (Pb-free) CY25200KFZXCT 16-Pin TSSOP – Tape and Reel (Pb-free) ...

Page 11

... SKEW Removed specific PD# and OE pin nos. from parameters T Standardized timing parameter names to upper case Corrected part numbers in Ordering Information Table Removed part number CY25200FZXCT Added part number CY25200KFZXCT Replaced CY3672 and CY3672-PRG with CY3672-USB CY25200 for clarity values, ...

Page 12

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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