CY28411ZXC Cypress Semiconductor Corp, CY28411ZXC Datasheet - Page 5

• Manufacturer Part Number: CY28411ZXC
• Description: IC CLOCK GEN ALVISO 56TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Distribution, Spread Spectrum Clock Generatorr

Specifications of CY28411ZXC

• Pll: Yes
• Input: LVTTL, Crystal
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 7:20
• Differential - Input:output: No/Yes
• Frequency - Max: 266MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP II
• Frequency-max: 100MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-07594 Rev. *B
Byte 0:Control Register 0 (continued)
Byte 1: Control Register 1
Byte 2: Control Register 2
Byte 3: Control Register 3
Bit
Bit
Bit
Bit
5
4
3
2
1
0
2
1
0
7
6
7
6
5
7
6
5
4
3
2
1
0
@Pup
@Pup
@Pup
@Pup
1
1
1
1
1
1
1
0
1
1
0
0
0
0
1
1
1
1
1
1
1
1
DOT_96T/C
SRC[T/C]2
SRC[T/C]1
SRC[T/C]0
CPU[T/C]1
CPU[T/C]0
Reserved
Reserved
Reserved
Reserved
USB_48
CPUT/C
SRCT/C
PCIF0
Name
Name
Name
Name
PCIF1
SRC7
SRC6
SRC5
PCIF
REF
PCI5
PCI4
PCI3
PCI2
PCI
SRC[T/C]2 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]1 Output Enable
0 = Disable (Hi-Z), 1 = Enable
SRC[T/C]0 Output Enable
0 = Disable (Hi-Z), 1 = Enable
PCIF0 Output Enable
0 = Disabled, 1 = Enabled
DOT_96 MHz Output Enable
0 = Disable (Hi-Z), 1 = Enabled
USB_48 MHz Output Enable
0 = Disabled, 1 = Enabled
REF Output Enable
0 = Disabled, 1 = Enabled
Reserved
CPU[T/C]1 Output Enable
0 = Disable (Hi-Z), 1 = Enabled
CPU[T/C]0 Output Enable
0 = Disable (Hi-Z), 1 = Enabled
Spread Spectrum Enable
0 = Spread off, 1 = Spread on
PCI5 Output Enable
0 = Disabled, 1 = Enabled
PCI4 Output Enable
0 = Disabled, 1 = Enabled
PCI3 Output Enable
0 = Disabled, 1 = Enabled
PCI2 Output Enable
0 = Disabled, 1 = Enabled
Reserved, Set = 1
Reserved, Set = 1
Reserved, Set = 1
PCIF1 Output Enable
0 = Disabled, 1 = Enabled
Allow control of SRC[T/C]7 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of SRC[T/C]6 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of SRC[T/C]5 with assertion of PCI_STP# or SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Description
Description
Description
Description
CY28411
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