CY25100ZXI31 Cypress Semiconductor Corp, CY25100ZXI31 Datasheet - Page 4

• Manufacturer Part Number: CY25100ZXI31
• Description: IC FLD/FACTORY PROG SSCLK 8TSSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Distribution, Spread Spectrum Clock Generatorr

Specifications of CY25100ZXI31

• Number Of Circuits: 1
• Package / Case: 8-TSSOP
• Pll: Yes
• Input: CMOS, Crystal
• Output: CMOS
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 200MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.13 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Frequency-max: 200MHz
• Maximum Input Frequency: 166 MHz
• Minimum Input Frequency: 8 MHz
• Output Frequency Range: 3 MHz to 200 MHz
• Supply Voltage (max): 3.45 V
• Supply Voltage (min): 3.13 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3690 - SOCKET ADAPTER FOR CY25100CY3691 - SOCKET ADAPTER FOR CY25100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Absolute Maximum Rating
Supply Voltage (V
DC Input Voltage ......................................–0.5V to V
Storage Temperature (Non condensing)..... –55°C to +125°C
Recommended Crystal Specifications
Operating Conditions
DC Electrical Characteristics
Note
Document #: 38-07499 Rev. *H
F
C
R
R
DL
V
T
C
F
F
F
F
T
I
I
V
V
I
I
I
C
C
C
1. Guaranteed by characterization, not 100% tested.
Parameter
Parameter
Parameter
OH
OL
IH
IL
OZ
A
NOM
DD
ref
SSCLK
REFCLK
MOD
PU
IH
IL
LNOM
1
3
LOAD
XIN
XOUT
IN
/R
[1]
1
or
[1]
Nominal Crystal Frequency
Nominal Load Capacitance
Equivalent Series Resistance (ESR)
Ratio of Third Overtone Mode ESR to
Fundamental Mode ESR
Crystal Drive Level
Supply Voltage
Ambient Commercial Temperature
Ambient Industrial Temperature
Maximum Load Capacitance at Pin 6 and Pin 7
External Reference Crystal
(Fundamental tuned crystals only)
External Reference Clock
SSCLK Output Frequency, C
REFCLK Output Frequency, C
Spread Spectrum Modulation Frequency
Power Up Time for all VDDs to reach minimum specified voltage (power ramp must be
monotonic)
Output High Current
Output Low Current
Input High Voltage
Input Low Voltage
Input High Current, PD#/OE and
SSON# Pins
Input Low Current, PD#/OE and SSON#
Pins
Output Leakage Current
Programmable Capacitance at Pin 2
and Pin 3
Input Capacitance at Pin 4 and Pin 8
DD
)........................................ –0.5 to +7.0V
Description
Description
LOAD
LOAD
= 15 pF
= 15 pF
Description
DD
V
V
CMOS levels, 70% of V
CMOS levels, 30% of V
V
V
Three-state output, PD#/OE = 0, output pulldown
resistor disabled
Capacitance at minimum setting
Capacitance at maximum setting
Input pins excluding XIN and XOUT
Parallel resonance, fundamental mode, AT cut
Internal load caps
Fundamental mode
Ratio used because typical R
less than the maximum spec
No external series resistor assumed
OH
OL
in
in
+ 0.5
= V
= V
= 0.5, V
= V
DD
SS
DD
– 0.5, V
DD
Junction Temperature ................................ –40°C to +125°C
Data Retention at Tj = 125°C ................................> 10 years
Package Power Dissipation...................................... 350 mW
Static Discharge Voltage.......................................... > 2000V
(per MIL-STD-883, Method 3015)
= 3.3V (sink)
Comments
Condition
DD
= 3.3V (source)
DD
DD
1
values are much
0.7V
3.13
30.0
0.05
Min
Min
Min
–40
–10
–10
–10
10
10
0
–
8
8
3
8
–
–
–
8
6
–
3
–
–
DD
3.30
31.5
Typ
Typ
Typ
0.5
12
12
12
60
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5
CY25100
0.3V
Max
Max
3.45
33.0
166
200
166
500
Max
V
Page 4 of 14
30
30
25
70
85
15
30
10
10
10
–
2
DD
–
–
7
DD
MHz
Unit
MHz
MHz
MHz
MHz
Unit
mW
kHz
ms
Unit
°C
°C
pF
pF
mA
mA
Ω
V
μA
μA
μA
pF
pF
pF
–
V
V
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