LMX2377UTM National Semiconductor, LMX2377UTM Datasheet - Page 34

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LMX2377UTM

Manufacturer Part Number
LMX2377UTM
Description
IC FREQ SYNTH DUAL 20TSSOP
Manufacturer
National Semiconductor
Series
PLLatinum™r
Type
PLL Frequency Synthesizerr
Datasheet

Specifications of LMX2377UTM

Pll
Yes with Bypass
Input
CMOS, TTL
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
3:1
Differential - Input:output
Yes/No
Frequency - Max
2.5GHz, 1.2GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
2.5GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*LMX2377UTM
www.national.com
2.0 Programming Description
2.1 MICROWIRE INTERFACE
The 22-bit shift register is loaded via the MICROWIRE interface. The shift register consists of a 20-bit Data[19:0] Field and a 2-bit
Address[1:0] Field as shown below. The Address Field is used to decode the internal control register address. When LE
transitions HIGH, data stored in the shift register is loaded into one of 4 control registers depending on the state of the address
bits. The MSB of Data is loaded in first. The Data field assignments are shown in Section 2.3 CONTROL REGISTER CONTENT
MAP.
2.2 CONTROL REGISTER LOCATION
The address bits Address[1:0] decode the internal register address. The table below shows how the address bits are mapped into
the target control register.
2.3 CONTROL REGISTER CONTENT MAP
The control register content map describes how the bits within each control register are allocated to specific control functions.
MSB
21
Address[1:0]
0
0
1
1
Data[19:0]
Field
0
1
0
1
34
2 1
Register
Main R
Main N
Target
Aux R
Aux N
Address[1:0]
LSB
0

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