SI5320-G-BC Silicon Laboratories Inc, SI5320-G-BC Datasheet - Page 21

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SI5320-G-BC

Manufacturer Part Number
SI5320-G-BC
Description
SONET/SDH PREC CLOGBCK MULT
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheet

Specifications of SI5320-G-BC

Package / Case
63-CBGA
Pll
Yes
Input
LVTTL
Output
CML
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
Yes/Yes
Frequency - Max
693MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
693MHz
Mounting Style
SMD/SMT
Description/function
The is a precision clock multiplier designed to exceed the requirements of high speed communication systems
Operating Supply Voltage
3.3 V
Operating Temperature Range
- 55 C to + 150 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5320-G-BC
Manufacturer:
SILICON
Quantity:
215
Part Number:
SI5320-G-BC
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
2.13. Design and Layout Guidelines
Precision clock circuits are susceptible to board noise
and EMI. To take precautions against unacceptable
levels of board noise and EMI affecting performance of
the Si5320, consider the following:
Power the device from 3.3 V since the internal
regulator provides at least 40 dB of isolation to the
V
Use an isolated local plane to connect the V
pins. Avoid running signal traces over or below this
plane without a ground plane in between.
Route all I/O traces between ground planes as much
as possible
Maintain an input clock amplitude in the 200 mV
500 mV
Excessive high-frequency harmonics of the input
clock should be minimized. The use of filters on the
input clock signal can be used to remove high-
frequency harmonics.
DD25
pins (which power the PLL circuitry).
PP
differential range.
DD25
PP
Rev. 2.5
to
Si5320
21

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