PI6C3991JE Pericom Semiconductor, PI6C3991JE Datasheet
PI6C3991JE
Manufacturer Part Number
PI6C3991JE
Description
IC PROG SKEW CLOCK DRIVER 32PLCC
Manufacturer
Pericom Semiconductor
Series
SuperClock®r
Type
Clock Bufferr
Datasheet
1.PI6C3991J.pdf
(11 pages)
Specifications of PI6C3991JE
Pll
Yes
Input
LVTTL
Output
LVTTL
Number Of Circuits
1
Ratio - Input:output
5:4
Differential - Input:output
No/No
Frequency - Max
80MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Frequency-max
80MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Features
• All output pair skew <100ps typical (250 Max.)
• 3.75 MHz to 80 MHz output operation
• User-selectable output functions
• Zero input-to-output delay
• 50% duty-cycle outputs
• LVTTL outputs drive 50-ohm terminated lines
• Operates from a single 3.3V supply
• Low operating current
• Available in 32-pin PLCC (J) package
• Jitter < 200ps peak-to-peak (< 25ps RMS)
Logic Block Diagram
REF
— Selectable skew to 18ns
— Inverted and Non-Inverted
— Operation at ½ and ¼ input frequency
— Operation at 2X and 4X input frequency
FB
(input as low as 3.75 MHz, x4 operation)
Test
Phase
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1
Freq.
DET
FS
Select Inputs
(three level)
Filter
Generator
Time Unit
VCO and
Select
Matrix
Skew
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
1
Description
PI6C3991 offers selectable control over system clock functions.
These multiple-output clock drivers provide the system integrator
with functions necessary to optimize the timing of high-perfor-
mance computer systems. Eight individual drivers, arranged as four
pairs of user-controllable outputs, can each drive terminated trans-
mission lines with impedances as low as 50 ohms while delivering
minimal and specified output skews and full-swing logic levels
(LVTTL).
Each output can be hardwired to one of nine skews or function
configurations. Delay increments of 0.7ns to 1.5ns are determined
by the operating frequency with outputs able to skew up to ±6 time
units from their nominal “zero” skew position. The completely
integrated PLL allows external load and transmission line delay
effects to be canceled. The user can create output-to-output skew
up to ±12 time units.
Divide-by-two and divide-by-four output functions are provided
for additional flexibility in designing complex clock systems. When
combined with the internal PLL, these divide functions allow
distribution of a low-frequency clock that can be multiplied by
two or four at the clock destination. This feature allows flexibility
and simplifies system timing distribution design for complex
high-speed systems.
Pin Configuration
V
V
GND
GND
Programmable Skew Clock Buffer
CCQ
CCN
4Q1
4Q0
3F1
4F0
4F1
3.3V High-Speed, Low-Voltage
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19
4
3
2
32-Pin
1
J
32 31
30
20
29
28
27
26
25
24
23
22
21
SuperClock
PI6C3991
PS8450C
2F0
GND
1F1
1F0
V
1Q0
1Q1
GND
GND
CCN
08/15/02
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PI6C3991JE Summary of contents
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... Package Diagram - 32-Pin PLCC (J) Ordering Information 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 3.3V High-Speed, Low-Voltage Programmable Pericom Semiconductor Corporation 1 1 Skew Clock Buffer - SuperClock PS8450C PI6C3991 08/15/02 ...