PI6C3Q993-5QE Pericom Semiconductor, PI6C3Q993-5QE Datasheet

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PI6C3Q993-5QE

Manufacturer Part Number
PI6C3Q993-5QE
Description
IC PROG PLL CLOCK DRIVER 28-QSOP
Manufacturer
Pericom Semiconductor
Series
SuperClock®r
Type
PLL Clock Driverr
Datasheet

Specifications of PI6C3Q993-5QE

Pll
Yes with Bypass
Input
CMOS
Output
CMOS, LVTTL
Number Of Circuits
1
Ratio - Input:output
1:8
Differential - Input:output
No/No
Frequency - Max
85MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-QSOP
Frequency-max
85MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Features
• PI6C3Q99x family provides following products:
• Inputs are 5V Tolerant
• 4 pairs of programmable skew outputs
• Low skew: 200ps same pair; 250ps all outputs
• Selectable positive or negative edge synchronization:
• Synchronous output enable
• Input frequency: 3.75 MHz to 85 MHz
• Output frequency: 15 MHz to 85MHz
• 2x, 4x, 1/2, and 1/4 outputs
• 3 skew grades:
• 3-level inputs for skew and PLL range control
• PLL bypass for DC testing
• External feedback, internal loop filter
• 12mA balanced drive outputs
• Low Jitter: < 200ps peak-to-peak
• Industrial temperature range
• Packaging (Pb-free and Green available):
Pin Configurations
PI6C3Q991: 32-pin PLCC version
PI6C3Q993: 28-pin QSOP version
Excellent for DSP applications
PI6C3Q99x: t
PI6C3Q99x-5: t
PI6C3Q99x-2: t
—32-pin PLCC
—28-pin QSOP
V CCQ /PE
09-0003
V CCN
GND
GND
4Q1
4Q0
3F1
4F0
4F1
SKEW0
SKEW0
SKEW0
<750ps
5
6
7
8
9
10
11
12
13
14
<500ps
<250ps
4
PI6C3Q991
15 16
3
2
17 18 19 20
1
32 31 30
29
28
27
26
25
24
23
22
21
2F0
GND/sOE
1F1
1F0
V CCN
1Q0
1Q1
GND
GND
3.3V Programmable Skew PLL Clock Driver
1
Description
The PI6C3Q99x family is a 3.3V PLL-based clock driver intended for
high-performance computing and data-communication applica-
tions. A key feature of the programmable skew is the ability of
outputs to lead or lag the REF input signal. The PI6C3Q991 has 8
programmable skew outputs in 4 banks of 2, while the PI6C3Q993
has 6 programmable skew outputs and 2 zero skew outputs. Skew
is controlled by 3-level input signals that may be hard-wired to
appropriate HIGH-MID-LOW levels.
When the GND/sOE pin is held LOW, all outputs are synchronously
enabled. However, if GND/sOE is held HIGH, all outputs except 3Q0
and 3Q1 are synchronously disabled. Furthermore, when the V
/PE is held HIGH, all outputs are synchronized with the positive
edge of the REF clock input. When V
outputs are synchronized with the negative edge of REF. Both
devices have LVTTL 12mA balanced drive outputs.
V CCQ /PE
V CCQ
V CCN
V CCN
GND
REF
4Q1
4Q0
3Q1
3Q0
3F0
3F1
FS
FB
PI6C3Q991, PI6C3Q993
PI6C3Q993
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CCQ
28
27
26
25
24
23
22
21
20
19
18
17
16
15
/PE is held LOW, all
SuperClock
GND
TEST
2F1
2F0
GND/sOE
1F1
1F0
V CCN
1Q0
1Q1
GND
GND
2Q0
2Q1
PS8449H
10/27/09
CCQ
®

Related parts for PI6C3Q993-5QE

PI6C3Q993-5QE Summary of contents

Page 1

... A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The PI6C3Q991 has 8 programmable skew outputs in 4 banks of 2, while the PI6C3Q993 has 6 programmable skew outputs and 2 zero skew outputs. Skew is controlled by 3-level input signals that may be hard-wired to appropriate HIGH-MID-LOW levels ...

Page 2

... REF 2F1:0 FB 3Q0 3Q1 3 3F1:0 4Q0 4Q1 3 4F1:0 Table 1. Pin Descriptions PI6C3Q991, PI6C3Q993 PI6C3Q993 GND/sOE Skew Select 3 3 1F1:0 V /PE CCQ Skew Select 3 3 2F1:0 PLL Skew Select 3F1 ® 1Q0 1Q1 2Q0 2Q1 3Q0 3Q1 4Q0 4Q1 PS8449H 10/27/09 ...

Page 3

... and Time Unit Generator. The V CO when the output is connected to FB undivided. CO frequency when the part is configured for frequency CO skewed output is used, all other outputs will be skewed by U value. NOM 3 PI6C3Q991, PI6C3Q993 of the PLL to adjust ± ± ° 5 ± ...

Page 4

... Notes: 5. Programmable skew on pair #4 is not applicable for the PI6C3Q993 disables outputs if TEST = MID level and GND/sOE = HIGH. 7. When pair #4 is set to HH (inverted), GND/sOE disables pair #4 HIGH when V V /PE = LOW CCQ Table 4. Absolute Maximum Ratings Supply Voltage to Ground ...................................... –0.5V to 7.0V Input Voltage .......................................................... – ...

Page 5

... PLL may require additional time before datasheet specifications are achieved. 9. Guaranteed by characterization but not production tested. 10. For 8 outputs each loaded with C = 20pF. L 09-0003 3.3V Programmable Skew PLL Clock Driver SuperClock Table 7. Power Supply Characteristics PI6C3Q991, PI6C3Q993 – – – /2. If inputs are switched, the CC ® μ μ PS8449H 10/27/09 ...

Page 6

... Table 8. Capacitance 3.0V 2.0V Vth=1.5V 0.8V 0V LVTTL Input Test Waveform 09-0003 3.3V Programmable Skew PLL Clock Driver SuperClock (T = 25° MHz Output Figure 1. AC Test Loads and Waveforms 6 PI6C3Q991, PI6C3Q993 = 0V 20pF t ORISE 2.0V t PWL 0.8V t PWH LVTTL Output Waveform ® OFALL ...

Page 7

... Refer to Table10 for more detail. 09-0003 3.3V Programmable Skew PLL Clock Driver SuperClock – – ≥ 25MHz. Guaranteed by design and characterization delay), Inverted (4Q0 and 4Q1 only with 4F0 = 4F1 = HIGH PI6C3Q991, PI6C3Q993 – – – – delay ambient temperature stable & within CC PD ® ...

Page 8

... ODCV ODCV t t SKEWPR SKEWPR t SKEW0 SKEW0 SKEW2 t t SKEW3,4 SKEW3,4 t SKEW1,3,4 Figure 2. AC Timing Diagram /PE=V . For V /PE=GND, the negative edge of FB aligns with the negative edge CCQ CC CCQ / PI6C3Q991, PI6C3Q993 (22 less than t limit, H PWC SKEW2 t SKEW3,4 t SKEW2,4 delay has been selected when U ...

Page 9

... Packaging Mechanical: 32-Pin PLCC Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php • 09-0003 3.3V Programmable Skew PLL Clock Driver SuperClock 9 PI6C3Q991, PI6C3Q993 ® PS8449H 10/27/09 ...

Page 10

... & & PI6C3Q991, PI6C3Q993 DOCUMENT CONTROL NO. REVISION: F .008 DATE: 10/22/07 0.20 MIN. .008 .013 0.20 0.33 .016 .035 0.41 0.89 .041 1.04 REF Detail A 0.178 .007 0.254 .010 .228 .244 5.79 6.19 Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 • ...

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