SI4133T-BM Silicon Laboratories Inc, SI4133T-BM Datasheet - Page 19

IC RF SYNTHESIZER DUAL 28MLP

SI4133T-BM

Manufacturer Part Number
SI4133T-BM
Description
IC RF SYNTHESIZER DUAL 28MLP
Manufacturer
Silicon Laboratories Inc
Type
Frequency Synthesizerr
Datasheets

Specifications of SI4133T-BM

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
1.8GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
1.8GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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4. Functional Description
The Aero transceiver is the industry’s most integrated
RF front end for multi-band GSM/GPRS digital cellular
handsets and wireless data modems. The chipset
consists of the Si4200 GSM transceiver, Si4201
universal baseband interface, and Si4133T dual RF
synthesizer. The highly integrated solution eliminates
the IF SAW filter, external low noise amplifiers (LNAs)
for three bands, transmit and RF voltage controlled
oscillator (VCO) modules, and more than 60 other
discrete components found in conventional designs.
The high level of integration combined with quad flat no-
lead package (QFN) technology and fine line CMOS
process technology results in a solution with 50% less
area and 80% fewer components than competing
solutions. A triple-band GSM transceiver using the Aero
chipset can be implemented with 24 components in less
than 2.4 cm
an enabling force in lowering the cost, simplifying the
design and manufacturing, and shrinking the form factor
in
terminals.
The receive section uses a digital low-IF architecture
that avoids the difficulties associated with direct
conversion while delivering lower solution cost and
reduced complexity. The universal baseband interface
is compatible with any supplier’s baseband subsystem.
The transmit section is a complete up-conversion path
next-generation
2
of board area. This level of integration is
GSM
GSM
DCS
PCS
PCS
DCS
GSM/GPRS
PA
PA
Figure 12. Aero Transceiver Block Diagram
LNA
LNA
LNA
voice
0 / 90
and
PLL
RF
data
Rev. 1.4
Si4133T
PGA
PGA
DET
φ
from the baseband subsystem to the power amplifier,
and uses an offset phase locked loop (PLL) with a fully
integrated transmit VCO. The frequency synthesizer
uses Silicon Laboratories’ proven technology, which
includes integrated RF and IF VCOs, varactors, and
loop filters.
The unique integer-N PLL architecture used in the
Si4133T produces a transient response that is superior
in speed to fractional-N architectures without suffering
the high phase noise or spurious modulation effects
often associated with those designs. This fast transient
response makes the Aero chipset well suited to GPRS
multi-slot applications where channel switching and
settling times are critical.
While conventional solutions use BiCMOS or other
bipolar process technologies, the Aero chipset is the
industry’s first cellular transceiver to be implemented in
a 100% CMOS process. This brings the cost savings
and extensive manufacturing capacity of CMOS to the
GSM market.
Si4200
ADC
ADC
PLL
IF
XIN
100 kHz
PGA
PGA
13 or 26 MHz
VC-TCXO
Si4201
DAC
DAC
XOUT
AFC
Aero
Q
Q
I
I
19

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