DS1100LZ-45+T Maxim Integrated Products, DS1100LZ-45+T Datasheet - Page 4
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DS1100LZ-45+T
Manufacturer Part Number
DS1100LZ-45+T
Description
DELAY LINE 3V 5TAP 45NS 8-SOIC
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1100LZ-20.pdf
(7 pages)
Specifications of DS1100LZ-45+T
Number Of Taps/steps
5
Function
Tapped
Delay To 1st Tap
9nS
Tap Increment
9nS
Available Total Delays
45ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Independent Delays
-
TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
1.5V point on the trailing edge or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
t
input pulse.
t
input pulse.
t
pulse and the 1.5V point on the leading edge of any tap output pulse.
t
pulse and the 1.5V point on the trailing edge of any tap output pulse.
TEST SETUP DESCRIPTION
Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the
DS1100L. The input waveform is produced by a precision pulse generator under software control. Time
delays are measured by a time interval counter (20ps resolution) connected between the input and each
tap. Each tap is selected and connected to the counter by a VHF switch control unit. All measurements
are fully automated, with each instrument controlled by a central computer over an IEEE 488 bus.
TEST CONDITIONS INPUT:
Ambient Temperature:
Supply Voltage (V
Input Pulse:
Source Impedance:
Rise and Fall Time:
Pulse Width:
Period:
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Delay is measured at the 1.5V level on
the rising and falling edge.
Note: Above conditions are for test only and do not restrict the operation of the device under other
data sheet conditions.
WI
RISE
FALL
PLH
PHL
(Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the
(Time Delay, Rising): The elapsed time between the 1.5V point on the leading edge of the input
(Time Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge of the
CC
):
25°C ±3°C
3.3V ±0.1V
High = 3.0V ±0.1V
Low = 0.0V ±0.1V
50Ω max
3.0ns max (measured between 10% and 90%)
500ns (1μs for -500 version)
1μs (2μs for -500 version)
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DS1100L