TS555ID STMicroelectronics, TS555ID Datasheet - Page 8

• Manufacturer Part Number: TS555ID
• Description: IC TIMER CMOS SINGLE LP 8-SOIC
• Manufacturer: STMicroelectronics
• Type: 555 Type, Timer/Oscillator (Single)r

Specifications of TS555ID

• Frequency: 2.7MHz
• Voltage - Supply: 2 V ~ 16 V
• Current - Supply: 65µA
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Internal Timers: 1
• Supply Voltage (max): 16 V
• Supply Voltage (min): 2 V
• Maximum Power Dissipation: 715 mW
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Propagation Delay (max): 100 ns (Typ) @ 3 V to 5 V
• Current, Supply: 65 uA (Typ.)
• Number Of Pins: 8
• Package Type: SO8
• Power Dissipation: 715 mV
• Temperature, Operating: -40 °C
• Temperature, Storage: 125 °C
• Time, Fall, Output: 20 ns (Typ.)
• Time, Rise, Output: 25 ns (Typ.)
• Voltage, Control: 1.3 V (Typ.)
• Voltage, Output, High Level: 1.9 V (Typ.)
• Voltage, Output, Low Level: 0.1 V (Typ.)
• Voltage, Supply: 18 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Count: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-3045-5

TS555
TYPICAL CHARACTERISTICS
Figure 1 : Supply Current (each timer) versus
APPLICATION INFORMATION
MONOSTABLE OPERATION
In the monostable mode,the timer operates like a
one-shot generator. Referring to figure 2, the ex-
ternal capacitor is initially held discharged by a
transistor inside the timer.
Figure 2 :
8/12
Trigger
V
Out
CC
300
200
100
0
Supply Voltage
2
Reset
3
SUPPLY VOLTAGE, V
4
4
TS555
1
8
8
7
5
6
CC
12
(V)
Control Voltage
R
0.01 F
C
16
The circuit triggers on a negative-going input sig-
nal when the level reaches 1/3 V
gered, the circuit remains in this state until the set
time has elapsed, even if it is triggered again dur-
ing this interval. The duration of the output HIGH
state is given by t = 1.1 R x C.
It can be noticed that since the charge rate and the
threshold level of the comparator are both directly
proportional to the supply voltage, the timing inter-
val is independent of the supply. Applying a nega-
tive pulse simultaneously to the Reset terminal
(pin 4) and the Trigger terminal (pin 2) during the
timing cycle discharges the external capacitor and
causes the cycle to start over. The timing cycle
now starts on the positive edge of the reset pulse.
While the reset pulse is applied, the output is driv-
en to the LOW state.
When a negative trigger pulse is applied to pin 2,
the flip-flop is set, releasing the short circuit across
the external capacitor and driving the output
HIGH. The voltage across the capacitor increases
exponentially with the time constant = R x C.
When the voltage across the capacitor equals 2/3
V
discharges the capacitor rapidly and drives the
output to its LOW state.
Figure 3 shows the actual waveforms generated in
this mode of operation.
When Reset is not used, it should be tied high to
avoid any possible or false triggering.
Figure 3 :
CC
, the comparator resets the flip-flop which then
t = 0.1 ms / div
R = 9.1k , C = 0.01 F , R = 1.0k
OUTPUT VOLTAGE = 5.0V/div
INPUT = 2.0V/div
CAPACITOR VOLTAGE = 2.0V/div
L
CC
. Once trig-