LTC6906IS6#TRMPBF Linear Technology, LTC6906IS6#TRMPBF Datasheet - Page 5

• Manufacturer Part Number: LTC6906IS6#TRMPBF
• Description: IC OSC PREC LP RES SET TSOT23-6
• Manufacturer: Linear Technology
• Type: Oscillator, Siliconr

Specifications of LTC6906IS6#TRMPBF

• Frequency: 1MHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Current - Supply: 78µA
• Operating Temperature: -40°C ~ 85°C
• Package / Case: TSOT-23-6, TSOT-6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Count: -

PIN FUNCTIONS
BLOCK DIAGRAM
OUT (Pin 1): Oscillator Output. The OUT pin swings from
GND to V
150Ω. For micropower operation, the load re sistance must
be kept as high as possible and the load capacitance as
low as possible.
GND (Pin 2): Ground.
DIV (Pin 3): Divider Setting Input. This three-level input
selects one of three internal digital divider settings, de-
termining the value of N in the frequency equation. Tie to
GND for ÷1, leave floating for ÷3 and tie to V
When left floating, the LTC6906 pulls Pin 3 to mid-supply
with a 2.5M resistor. When Pin 3 is floating, care should
be taken to reduce coupling from the OUT pin and its
trace to Pin 3. Coupling can be reduced by increasing the
physical space between traces or by shielding the DIV pin
with grounded metal.
SET (Pin 4): Frequency Setting Resistor Input. Connect
a resistor, R
frequency. For best perform ance use a precision metal- or
thin-film resistor of 0.5% or better tolerance and 50ppm/°C
V
SET
≅ V
V
GRD
SET
R
+
SET
≅ 650mV
SET
with an output resis tance of approximately
, from this pin to GND to set the oscillator
6
2
4
5
V
GND
SET
GRD
+
DECOUPLING
NETWORK
20
I
SET
BUFFER
= I
FB
800pF
V
V
SET
SET
I
FB
FREQUENCY-TO-CURRENT
I
FB
CONVERTERS
–
+
f
OSC
OP AMP
+
for ÷10.
f
OSC
(MASTER OSCILLATOR)
or better temperature coefficient. For lower accu racy ap-
plications, an inexpensive 1% thick-film resistor may be
used. Limit the capacitance in parallel with R
than 10pF to reduce jitter and to ensure stability. Capaci-
tance greater than 10pF could cause the LTC6906 internal
feedback circuits to oscillate. The volt age on the SET pin
is approximately 650mV and decreases with temperature
by about –2.2mV/°C.
GRD (Pin 5): Guard Signal. This pin can be used to reduce
PC board leakage across the frequency setting resistor,
R
SET pin and shunts leakage current away from the SET pin.
To control leakage, connect a bare copper trace (a trace
with no solder mask) to GRD and loop it around the SET
pin and all PC board metal connected to SET.
V
is internally decoupled with a 20Ω resistor in series with
an 800pF capacitor. No external decoupling capacitor is
required for OUT pin loads less than 50pF . V
kept reasonably free of noise and ripple.
= 1MHz • 100k/R
CONTROLLED
OSCILLATOR
+
SET
VOLTAGE
(Pin 6): Voltage Supply (2.25V to 3.6V). This supply
. The GRD pin is held within a few millivolts of the
SET
f
OSC
PROGRAMMABLE
THREE-LEVEL
DIVIDER (n)
DETECTOR
(1, 3, 10)
INPUT
DIVIDER
SELECT
150 DRIVER
LTC6906
V
+
5M
5M
OUT
+
DIV
SET
6906 BD
should be
3
1
to less
6906fb
5