DS1075Z-010 Maxim Integrated Products, DS1075Z-010 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
DS1075Z-010
Manufacturer Part Number
DS1075Z-010
Description
ECONOSCILLATOR/DIV 10MHZ 8-SOIC
Manufacturer
Maxim Integrated Products
Series
EconOscillator™r
Type
Oscillator, Fixed Frequency, Dualr
Datasheet
1.DS1075Z-803.pdf
(18 pages)
Specifications of DS1075Z-010
Frequency
10MHz
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
35mA
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Count
-
DS1075
PIN DESCRIPTIONS
Input/Output Pin (IN/OUT): This pin is the main oscillator output, with a frequency determined by clock
reference, M and N dividers. Except in programming mode this pin is always an output and will be
referred to as “OUT”. In programming mode this pin will be referred to as “IN”.
External Oscillator Input (OSCIN): This pin can be used to supply an external reference frequency to
the device.
Crystal Oscillator Connection (XTAL): A crystal can be connected between this pin and OSCIN to
provide an alternative frequency reference. If a crystal is not used this pin should be left open.
Output Enable Function (OE pin): The DS1075 also features a “synchronous” output enable. When
OE is at a high logic level the oscillator free runs. When this pin is taken low OUT is held low,
immediately if OUT is already low, or at it’s next high-to-low transition if OUT is high. This prevents
any possible truncation of the output pulse width when the enable is used. While the output is disabled
the master oscillator continues to run (producing an output at OUT0, if the
bit = 0) but the internal
EN0
counters (/N) are reset. This results in a constant phase relationship between OE’s return to a high level
and the resulting OUT signal. When the enable is released OUT will make its first transition within one
to two clock periods of the master clock.
Power-Down/Select Function (
/
PDN/SELX pin): The Power-Down/Select (
/
) pin
PDN
SELX
PDN
SELX
has a user-selectable function determined by one bit (
bit) of the user-programmable memory.
PDN
According to which function is selected, this pin will be referred to as
or
.
PDN
SELX
If the Power-Down function is selected (PDN bit = 1) a low logic level on this pin can be used to make
the device stop oscillating (active low) and go into a reduced power consumption state. The “Enabling
Sequencer” circuitry will first disable OUT in the same way as when OE is used. Next OUT0 will be
disabled in a similar fashion. Finally the oscillator circuitry will be disabled. In this mode both outputs
will go into a high impedance state. The power consumption in the power-down state is much less than if
OE is used because the internal oscillator (if used) is completely powered down. Even if an external
reference or a crystal is used all of the on-chip buffers are powered down to minimize current drain.
Consequently the device will take considerably longer to recover (i.e., achieve stable oscillation) from a
power-down condition than if the OE is used.
If the Select function is chosen (PDN bit = 0) this pin can be used to switch between the internal
oscillator and an external reference (or crystal) on the fly. When this mode is chosen the E/
select bit is
I
overridden, a high logic level on
will select the internal oscillator, a low logic level will select the
SELX
external reference (or crystal oscillator).
Reference Output (OUT0 pin): A reference output, OUT0, is also available from the output of the
reference select mux. This output is especially useful as a buffered output of a crystal defined master
frequency. OUT0 is unaffected by the OE pin, but is disabled in a glitchless fashion if the device is
powered down. If this output is not required it can be permanently disabled by setting the
bit to one,
EN0
and there will be a corresponding reduction in overall power consumption.
USER-PROGRAMMABLE REGISTERS
The following registers can be programmed by the user to determine operating frequency and mode of
operation. Details of how these registers are programmed can be found in a later section, in this section
3 of 18