M41ST85WMH6E STMicroelectronics, M41ST85WMH6E Datasheet - Page 23

IC RTC 3.0V 512BIT NVRAM 28SOIC

M41ST85WMH6E

Manufacturer Part Number
M41ST85WMH6E
Description
IC RTC 3.0V 512BIT NVRAM 28SOIC
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Datasheet

Specifications of M41ST85WMH6E

Memory Size
64B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Function
Clock/Calendar/Supervisor/Alarm
Rtc Memory Size
64 Byte
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial (2-Wire, I2C)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-2804-5
M41ST85WMH6

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Part Number:
M41ST85WMH6E
Quantity:
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M41ST85W
3.4
Note:
Figure 15. Alarm interrupt reset waveform
Table 3.
RPT5
1
1
1
1
1
0
ACTIVE FLAG
IRQ/FT/OUT
Setting alarm clock registers
Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go
off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every
year, month, day, hour, minute, or second. It can also be programmed to go off while the
M41ST85W is in the battery backup to serve as a system wake-up call.
Bits RPT5–RPT1 put the alarm in the repeat mode of operation.
configurations. Codes not listed in the table default to the once per second mode to quickly
alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5–RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set, the
alarm condition activates the IRQ/FT/OUT pin as shown in
write '0' to the alarm date register and to RPT5–RPT1.
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “Alarm Seconds,” the
address pointer will increment to the flag address, causing this situation to occur.
The IRQ/FT/OUT output is cleared by a READ to the flags register. A subsequent READ of
the flags register is necessary to see that the value of the alarm flag has been reset to '0.'
The IRQ/FT/OUT pin can also be activated in the battery backup mode. The IRQ/FT/OUT
will go low if an alarm occurs and both ABE (alarm in battery backup mode enable) and AFE
are set. The ABE and AFE bits are reset during power-up, therefore an alarm generated
during power-up will only set AF. The user can read the flag register at system boot-up to
determine if an alarm was generated while the M41ST85W was in the deselect mode during
power-up.
Alarm repeat modes
RPT4
Figure 16 on page 24
0Eh
1
1
1
1
0
0
RPT3
1
1
1
0
0
0
illustrates the backup mode alarm timing.
0Fh
RPT2
1
1
0
0
0
0
RPT1
1
0
0
0
0
0
Figure
Table 3
15. To disable alarm,
HIGH-Z
10h
Once per second
shows the possible
Once per minute
Once per month
Alarm setting
Once per hour
Once per year
Once per day
Clock operation
AI03664
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