M41T81SMY6E STMicroelectronics, M41T81SMY6E Datasheet - Page 18

• Manufacturer Part Number: M41T81SMY6E
• Description: IC RTC SER W/ALARMS 18-SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/Alarmr

Specifications of M41T81SMY6E

• Memory Size: 20B
• Time Format: HH:MM:SS:hh (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 18-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Clock operation
Note:
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When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5-RPT1, the AF (alarm flag) is set. If AFE (alarm flag enable) is also set (and
SQWE is '0.'), the alarm condition activates the IRQ/FT/OUT/SQW pin.
If the address pointer is allowed to increment to the flags register address, an alarm
condition will not cause the Interrupt/Flag to occur until the address pointer is moved to a
different address. It should also be noted that if the last address written is the “Alarm
Seconds,” the address pointer will increment to the flag address, causing this situation to
occur.
The IRQ/FT/OUT/SQW output is cleared by a READ to the flags register as shown in
Figure
alarm flag has been reset to '0.'
The IRQ/FT/OUT/SQW pin can also be activated in the battery backup mode. The
IRQ/FT/OUT/SQW will go low if an alarm occurs and both ABE (alarm in battery backup
mode enable) and AFE are set.
Figure 13. Alarm interrupt reset waveform
Figure 14. Backup mode alarm waveform
IRQ/FT/OUT/SQW
ACTIVE FLAG
V
IRQ/FT/OUT/SQW
V
V
ABE and AFE Bits
AF Bit in Flags
Register
13. A subsequent READ of the flags register is necessary to see that the value of the
CC
PFD
SO
0Eh
HIGH-Z
Doc ID 10773 Rev 6
Figure 14
illustrates the backup mode alarm timing.
0Fh
trec
HIGH-Z
10h
M41T81S
AI09164b
AI04617