M41ST87WSS6F STMicroelectronics, M41ST87WSS6F Datasheet - Page 34

IC SUPERVISOR RTC/NVRAM 20-SSOP

M41ST87WSS6F

Manufacturer Part Number
M41ST87WSS6F
Description
IC SUPERVISOR RTC/NVRAM 20-SSOP
Manufacturer
STMicroelectronics
Type
Clock/Calendar/Supervisorr
Datasheets

Specifications of M41ST87WSS6F

Memory Size
160B
Time Format
HH:MM:SS:hh (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Function
Clock, Timestamp, Timekeeper, Watchdog, Alarm, Calendar, Timer, Timer Interrupt
Rtc Memory Size
1280 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial
Supply Current
500 nA
Clock Format
Ss
Clock Ic Type
RTC
Interface Type
I2C
Memory Configuration
128 X 8
Supply Voltage Range
2.7V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10616-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M41ST87WSS6F
Manufacturer:
FSC
Quantity:
6 000
Part Number:
M41ST87WSS6F
Manufacturer:
ST
Quantity:
20 000
Clock operation
Figure 24. Alarm interrupt reset waveform
Table 8.
34/52
ADDRESS POINTER
RPT5
1
1
1
1
1
0
ACTIVE FLAG
IRQ/OUT
alarm condition activates the IRQ/OUT pin as shown in
the alarm, write '0' to the alarm date register and to RPT5–RPT1.
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “alarm seconds,” the
address pointer will increment to the flag address, causing this situation to occur. Thus the
user should not leave the address pointer at 0Fh if using the alarm interrupt function. This is
easily handled by simply reading past the flags registers before teminating a read sequence.
The IRQ/OUT output is cleared by a READ to the flags register. A subsequent READ of the
flags register is necessary to see that the value of the alarm flag has been reset to '0.'
The IRQ/OUT pin can also be activated in the battery backup mode. The IRQ/OUT will go
low if an alarm occurs and both ABE (alarm in battery backup mode enable) and AFE are
set. The ABE and AFE bits are reset during power-up, therefore an alarm generated during
power-up will only set AF. The user can read the flag register at system boot-up to
determine if an alarm was generated while the M41ST87Y/W was in the deselect mode
during power-up.
Alarm repeat modes
RPT4
0Eh
1
1
1
1
0
0
Figure 25 on page 35
RPT3
1
1
1
0
0
0
Doc ID 9497 Rev 8
0Fh
illustrates the backup mode alarm timing.
RPT2
1
1
0
0
0
0
Figure 25 on page
RPT1
1
0
0
0
0
0
M41ST87Y, M41ST87W
HIGH-Z
10h
Once per second
Once per minute
Once per month
Once per hour
Alarm setting
Once per year
Once per day
35. To disable
AI07086

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