DS1394U-33+ Maxim Integrated Products, DS1394U-33+ Datasheet - Page 23
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DS1394U-33+
Manufacturer Part Number
DS1394U-33+
Description
IC RTC SPI 3WIRE W/CHRGR 10-MSOP
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/Trickle-Chargerr
Datasheet
1.DS1390U-3.pdf
(26 pages)
Specifications of DS1394U-33+
Time Format
HH:MM:SS:hh (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
SPI, 3-Wire Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
The DS1392/DS1393 provide a 3-wire serial-data bus,
and support both single-byte and multiple-byte data
transfers for maximum flexibility. The I/O pin is the seri-
al-data input/output pin. The CE input is used to initiate
and terminate a data transfer. The SCLK pin is used to
synchronize data movement between the master
(microcontroller) and the slave (DS1392/DS1393)
devices. Input data is latched on the SCLK rising edge
and output data is shifted out on the SCLK falling edge.
There is one clock for each bit transferred. Address
and data bits are transferred in groups of eight.
Address and data bytes are shifted LSB first into the
I/O pin. Data is transferred out LSB first on the I/O pin
for a read operation.
The address byte is always the first byte entered after
CE is driven high. The MSB (W/R) of this byte deter-
mines if a read or write takes place. If W/R is 0, one or
more read cycles occur. If W/R is 1, one or more write
cycles occur.
Data transfers can be one byte at a time or in multiple-
byte burst mode. After CE is driven high, an address is
written to the DS1392/DS1393. After the address, one
or more data bytes can be written or read. For a single-
byte transfer, one byte is read or written and then CE is
driven low (Figures 13 and 14). For a multiple-byte
transfer, however, multiple bytes can be read or written
after the address has been written (Figure 15). Each
read or write cycle causes the RTC register address to
automatically increment. Incrementing continues until
the device is disabled. The address wraps to 00h after
3-Wire Serial-Data Bus
Low-Voltage SPI/3-Wire RTCs with
____________________________________________________________________
incrementing to 0Fh (during a read) and wraps to 80h
after incrementing to 8Fh (during a write). Note, howev-
er, that an updated copy of the time is only loaded into
the user-accessible copy upon the rising edge of CE.
Reading the RTC registers in a continuous loop does
not show the time advancing.
TRANSISTOR COUNT: 11,525
PROCESS: CMOS
SUBSTRATE CONNECTED TO GROUND
Theta-JA: 180°C/W
Theta-JC: 41.9°C/W
Figure 15. 3-Wire Multiple-Byte Burst Transfer
SCLK
CE
I/O
ADDRESS
BYTE
Trickle Charger
BYTE 0
DATA
Thermal Information
BYTE 1
DATA
Chip Information
BYTE N
DATA
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