DS1305N Maxim Integrated Products, DS1305N Datasheet
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DS1305N
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DS1305N Summary of contents
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Rev 12/09 www.maxim-ic.com FEATURES Real-Time Clock (RTC) Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the Week, and Year with Leap-Year Compensation Valid Up to 2100 96-Byte, Battery-Backed NV RAM for Data Storage ...
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... TSSOP (173 mils) 20 TSSOP (173 mils) 20 TSSOP (173 mils) ) allows the DS1305 to drive SDO and CCIF pin allows the device to be backed up by BAT , V CC1 TOP MARK* DS1305 DS1305N DS1305 DS1305 DS1305 DS1305 DS1305 DS1305N DS1305 DS1305 pins to a level CC2 BAT ...
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PIN DESCRIPTION PIN NAME DIP TSSOP CC2 BAT N.C. 13 INT0 7 9 INT1 8 10 GND 9 11 SERMODE 10 ...
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PIN DESCRIPTION (continued) PIN NAME DIP TSSOP 12 15 SDI 13 16 SDO CCIF CC1 OPERATION The block diagram in Figure 1 shows the main elements of the serial alarm RTC. ...
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RECOMMENDED LAYOUT FOR CRYSTAL Local ground plane (Layer 2) crystal CLOCK ACCURACY The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between the capacitive load of the oscillator circuit and ...
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READING FROM THE CLOCK REGISTERS Buffers are used to copy the time and date register at the beginning of a read. When reading in burst mode, the user copy is static while the internal registers continue to increment. Figure 2. ...
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When bit 7 of the day, hour, minute, and seconds alarm registers is set to a logic 1, alarm occurs every second. During each clock update, the RTC compares ...
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AIE1 (Alarm Interrupt Enable 1) – When set to a logic 1, this bit permits the interrupt 1 request flag (IRQF1) bit in the status register to assert When the AIE1 bit is set to logic 0, the IRQF1 bit ...
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Table 3. TRICKLE CHARGER RESISTOR AND DIODE SELECT TCS TCS TCS TCS Bit 7 Bit 6 Bit 5 Bit ...
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Figure 4. POWER-SUPPLY CONFIGURATIONS NOTE: DEVICE IS WRITE-PROTECTED IF V NOTE: DEVICE DOES NOT PROVIDE AUTOMATIC WRITE PROTECTION. CONFIGURATION 1: BACKUP SUPPLY IS NONRECHARGEABLE LITHIUM BATTERY < CCTP CONFIGURATION 2: BACKUP SUPPLY IS A RECHARGEABLE BATTERY OR ...
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SERIAL INTERFACE The DS1305 offers the flexibility to choose between two serial interface modes. The DS1305 can communicate with the SPI interface or with a standard 3-wire interface. The interface method used is determined by the SERMODE pin. When this ...
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ADDRESS AND DATA BYTES Address and data bytes are shifted MSB first into the serial data input (SDI) and out of the serial data output (SDO). Any transfer requires the address of the byte to specify a write or read ...
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Figure 8. SPI MULTIPLE-BYTE BURST TRANSFER READING AND WRITING IN BURST MODE Burst mode is similar to a single-byte read or write, except that CE is kept high and additional SCLK cycles are sent until the end of the burst. ...
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INTERFACE The 3-wire interface mode operates similarly to the SPI mode. However, in 3-wire mode there is one I/O instead of separate data in and data out signals. The 3-wire interface consists of the I/O (SDI and SDO pins ...
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ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………..-0.5V to +7.0V Storage Temperature Range……………………………………………………………….-55°C to +125°C Soldering Temperature………………………………………….See IPC/JEDEC J-STD-020 Specification This is a stress rating only and functional operation of the device at these or any other ...
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DC ELECTRICAL CHARACTERISTICS (Over the operating range, unless otherwise specified.) PARAMETER Input Leakage Output Leakage I = 1.5mA Logic 0 OL Output I = 4.0mA -0.4mA Logic 1 OH Output I = -1.0mA OH V Active Supply ...
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AC ELECTRICAL CHARACTERISTICS (Over the operating range, unless otherwise specified.) (Figure 10 and Figure 11) PARAMETER Data to CLK Setup CLK to Data Hold CLK to Data Delay CLK Low Time CLK High Time CLK Frequency CLK Rise and ...
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Figure 10. TIMING DIAGRAM: 3-WIRE READ DATA TRANSFER SERMODE = GND * I/O IS SDI AND SDO TIED TOGETHER. Figure 11. TIMING DIAGRAM: 3-WIRE WRITE DATA TRANSFER SERMODE = GND * I/O IS SDI AND SDO TIED TOGETHER ...
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SPI AC ELECTRICAL CHARACTERISTICS (Over the operating range, unless otherwise specified.) (Figure 12 and Figure 13) PARAMETER Data to CLK Setup CLK to Data Hold CLK to Data Delay CLK Low Time CLK High Time CLK Frequency CLK Rise and ...
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Figure 12. TIMING DIAGRAM: SPI READ DATA TRANSFER SERMODE = SCLK CAN BE EITHER POLARITY, TIMING SHOWN FOR CPOL = 1. Figure 13. TIMING DIAGRAM: SPI WRITE DATA TRANSFER SERMODE = SCLK CAN BE ...
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NOTES and I are specified with CE set to a logic 0 and CC1T CC2T 2) I and I are specified with CC1A CC2A 2.0V 0V ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time © 2009 Maxim Integrated Products DESCRIPTION ” to Figures 6, 7, 12, and 13 Maxim is a registered trademark of Maxim Integrated Products, Inc. DS1305 PAGES CHANGED 5 12 ...