DS1337C# Maxim Integrated Products, DS1337C# Datasheet - Page 13

• Manufacturer Part Number: DS1337C#
• Description: IC RTC I2C W/ALARM 16-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Clock/Calendar/Alarmr

Specifications of DS1337C#

• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Function: Clock/Calendar
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (I2C)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 2. Data Transfer on I
Depending upon the state of the R/W bit, two types of data transfer are possible:
1) Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the master is the
2) Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the slave
The DS1337 can operate in the following two modes:
1) Slave Receiver Mode (Write Mode): Serial data and clock are received through SDA and SCL. After each
2) Slave Transmitter Mode (Read Mode): The first byte is received and handled as in the slave receiver mode.
slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received
byte. Data is transferred with the most significant bit (MSB) first.
address). The slave then returns an acknowledge bit, followed by the slave transmitting a number of data
bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the
last received byte, a “not acknowledge” is returned. The master device generates all of the serial clock pulses
and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START
condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus is not
released. Data is transferred with the most significant bit (MSB) first.
byte is received an acknowledge bit is transmitted. START and STOP conditions are recognized as the
beginning and end of a serial transfer. Address recognition is performed by hardware after reception of the
slave address and direction bit
generates the START condition. The slave address byte contains the 7-bit DS1337 address, which is 1101000,
followed by the direction bit (R/W), which, for a write, is 0. After receiving and decoding the slave address byte
the device outputs an acknowledge on the SDA line. After the DS1337 acknowledges the slave address +
write bit, the master transmits a register address to the DS1337. This sets the register pointer on the DS1337.
The master may then transmit zero or more bytes of data, with the DS1337 acknowledging each byte received.
The address pointer will increment after each data byte is transferred. The master generates a STOP condition
to terminate the data write.
However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is
transmitted on SDA by the DS1337 while the serial clock is input on SCL. START and STOP conditions are
recognized as the beginning and end of a serial transfer
first byte received after the master generates a START condition. The slave address byte contains the 7-bit
DS1337 address, which is 1101000, followed by the direction bit (R/W), which, for a read, is 1. After receiving
and decoding the slave address byte the device outputs an acknowledge on the SDA line. The DS1337 then
begins to transmit data starting with the register address pointed to by the register pointer. If the register
pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in
the register pointer. The DS1337 must receive a “not acknowledge” to end a read.
2
C Serial Bus
(Figure
3). The slave address byte is the first byte received after the master
13 of 16
(Figure 4
and
Figure
DS1337 I
5). The slave address byte is the
2
C Serial Real-Time Clock