DS1678S+ Maxim Integrated Products, DS1678S+ Datasheet - Page 24

• Manufacturer Part Number: DS1678S+
• Description: IC REAL TIME EVENT REC 8-SOIC
• Manufacturer: Maxim Integrated Products
• Type: Time Event Recorderr

Specifications of DS1678S+

• Memory Size: 32B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Function: Clock/Calendar/Alarm
• Rtc Memory Size: 32 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (I2C)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 6. Data Transfer on I
Figure 7. I
SDA
SCL
S D A
S D A
S C L
S C L
S D A
S D A
S D A
S C L
S C L
S C L
CONDITION
START
W rite to M e m o ry A d d re s s P o in te r
W rite to M e m o ry L o c a tio n (S in g le B y te )
S ta rt
S ta rt
R e a d S in g le B y te fro m C u rre n t M e m o ry A d d re s s P o in te r L o c a tio n
R e a d M u ltip le B y te s fro m C u rre n t M e m o ry A d d re s s P o in te r L o c a tio n
R e a d S in g le B y te fro m N e w M e m o ry A d d re s s P o in te r L o c a tio n
S ta rt
S ta rt
S ta rt
S D A
S C L
S
S
S
S
S
2
C Serial Communication with DS1678
1
1
1
1
1
D e vic e A d d re s s B yte
D e vic e A d d re s s B yte
0
0
0
0
0
D e vic e A d d re s s B yte
D e vic e A d d re s s B yte
D e vic e A d d re s s B yte
0
0
0
0
0
D 7
MSB
1
1
1
1
1
1
D 6
0
0
0
0
0
D 5
D a ta B yte
1
1
2
1
1
1
D 4
slave address
0
0
0
0
0
D 3
W
W
R d
R d
2
W
D 2
C Serial Bus
D S 1 6 7 8
D S 16 7 8
D S 1 6 7 8
D S 1 6 7 8
D S 1 6 7 8
A C K
A C K
A C K
A C K
A C K
A
A
A
A
A
D 1
A 7
A 7
A 7
D 7
D 7
6
D 0
A 6
M e m o ry A d d re s s B yte
M a s te r
A 6
M e m o ry A d d re s s B yte
N A C K
A 6
D 6
D 6
M e m o ry A d d re s s B yte
N
A 5
A 5
M o s t S ig n ific a n t
A 5
D 5
D 5
7
S to p
D a ta B yte
D a ta B yte
A 4
A 4
P
A 4
D 4
D 4
direction
A 3
A 3
A 3
D 3
D 3
R/W
8
bit
24 of 25
A 2
A 2
A 2
D 2
D 2
signal from receiver
acknowledgement
A 1
A 1
ACK
D 1
D 1
A 1
9
A 0
A 0
D 0
D 0
A 0
D S 1 6 7 8
D S 1 6 7 8
M a s te r
M a s te r
D S 1 67 8
A C K
N A C K
A C K
A C K
A C K
A
N
A
A
A
D 7
D 7
S to p
S to p
R e p e a te d
S ta rt
P
P
R
1
D 6
D 6
1
L e a s t S ig n ific a n t
D 5
D 5
D a ta B yte
0
D a ta B yte
2
D 4
D 4
repeated if more bytes
0
D 3
D e vic e A d d re s s
are transferred
D 3
3 - 8
1
D 2
D 2
B yte
0
D 1
D 1
1
8
D 0
D 0
signal from receiver
acknowledgement
D S 16 7 8
M a s te r
N A C K
0
A C K
N
A
R d
ACK
9
D S 1 6 7 8
S to p
S to p
A C K
P
P
A
START CONDITION
STOP CONDITION
REPEATED
OR