M48T59Y-70MH6E STMicroelectronics, M48T59Y-70MH6E Datasheet - Page 18

• Manufacturer Part Number: M48T59Y-70MH6E
• Description: IC TIMEKPR NVRAM 64KBIT 5V 28SOI
• Manufacturer: STMicroelectronics
• Series: Timekeeper®r
• Type: Clock/Calendar/NVSRAMr

Specifications of M48T59Y-70MH6E

• Memory Size: 64K (8K x 8)
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC, 28-SOH (8.48mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2861-5; M48T59Y-70MH6

3.7
3.8
3.9
Note:
Note:
18/32
Power-on reset
The M48T59/Y/V continuously monitors V
point, the RST pulls low (open drain) and remains low on power-up for t
V
appropriate resistor to V
Programmable interrupts
The M48T59/Y/V provides two programmable interrupts; an alarm and a watchdog. When
an interrupt condition occurs, the M48T59/Y/V sets the appropriate flag bit in the Flag
Register 1FF0h. The interrupt enable bits in (AFE and ABE) in 1FF6h and the Watchdog
Steering (WDS) Bit in 1FF7h allow the interrupt to activate the IRQ/FT pin.
The Alarm flag and the IRQ/FT output are cleared by a READ to the Flags Register. An
interrupt condition reset will not occur unless the addresses are stable at the flag location for
at least 15ns while the device is in the READ Mode as shown in
The IRQ/FT pin is an open drain output and requires a pull-up resistor (10 k
recommended) to V
occurs or the Frequency Test Mode is enabled.
Battery low flag
The M48T59/Y/V automatically performs periodic battery voltage monitoring upon power-up
and at factory-programmed time intervals of 24 hours (at day rollover) as long as the device
is powered and the oscillator is running. The Battery Low Flag (BL), Bit D4 of the Flags
Register 1FF0h, will be asserted high if the internal or SNAPHAT
less than approximately 2.5 V. The BL Flag will remain active until completion of battery
replacement and subsequent battery low monitoring tests, either during the next power-up
sequence or the next scheduled 24-hour interval.
If a battery low is generated during a power-up sequence, this indicates that the battery
voltage is below 2.5 V (approximately), which may be insufficient to maintain data integrity.
Data should be considered suspect and verified as correct. A fresh battery should be
installed.
If a battery low indication is generated during the 24-hour interval check, this indicates the
battery is near end of life. However, data has not been compromised due to the fact that a
nominal V
battery back-up mode, it is recommended that the battery be replaced. The SNAPHAT top
may be replaced while V
This will cause the clock to lose time during the interval the battery/crystal is removed.
Battery monitoring is a useful technique only when performed periodically. The M48T59/Y/V
only monitors the battery when a nominal V
which require extensive durations in the battery back-up mode should be powered-up
periodically (at least once every few months) in order for this technique to be beneficial.
Additionally, if a battery low is indicated, data integrity should be verified upon power-up via
a checksum or other technique.
PFD
(max). RST is valid for all V
CC
is supplied. In order to insure data integrity during subsequent periods of
CC
. The pin remains in the high impedance state unless an interrupt
CC
CC
should be chosen to control rise time.
is applied to the device.
CC
conditions. The RST pin is an open drain output and an
CC
CC
. When V
is applied to the device. Thus applications
CC
falls to the power fail detect trip
Figure 10 on page
®
battery is found to be
rec
after V
CC
16.
passes