DS17885-3 Maxim Integrated Products, DS17885-3 Datasheet - Page 17
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DS17885-3
Manufacturer Part Number
DS17885-3
Description
IC RTC 3V 8K NV RAM 24-DIP
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/NVSRAMr
Datasheet
1.DS17285S-5.pdf
(31 pages)
Specifications of DS17885-3
Memory Size
64K (8K x 8)
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.7 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS17885-3
Manufacturer:
DALLAS
Quantity:
6 246
Bit 7: Interrupt Request Flag (IRQF). This bit is set to
1 when any of the following are true:
PF = PIE = 1
AF = AIE = 1
UF = UIE = 1
Any time the IRQF bit is 1, the IRQ pin is driven low.
Flag bits PF, AF, and UF are cleared after reading
Register C.
Bit 6: Periodic Interrupt Flag (PF). This is a read-only
bit that is set to 1 when an edge is detected on the
selected tap of the divider chain. The RS3–RS0 bits
establish the periodic rate. PF is set to 1 independent
Bit 7: Valid RAM and Time (VRT). This bit indicates
the condition of the battery connected to the V
V
threshold, VRT
writeable and should always be a 1 when read. If a 0 is
Register C (0Ch)
MSB
Register D (0Dh)
MSB
BAUX
BIT 7
BIT 7
IRQF
VRT
pin. If either supply is above the internal voltage
TRIP
, the bit will be high. This bit is not
BIT 6
BIT 6
PF
0
WF = WIE = 1
KF = KSE = 1
RF = RIE = 1
BIT 5
BIT 5
Register D (0Dh)
AF
0
____________________________________________________________________
BAT
BIT 4
BIT 4
UF
0
and
of the state of the PIE bit. When both PF and PIE are 1s,
the IRQ signal is active and sets the IRQF bit. Reading
Register C clears this bit.
Bit 5: Alarm Interrupt Flag (AF). A 1 in this bit indicates
that the current time has matched the alarm time. If the
AIE bit is also 1, the IRQ pin goes low and a 1 appears in
the IRQF bit. Reading Register C clears this bit.
Bit 4: Update-Ended Interrupt Flag (UF). This bit is
set after each update cycle. When the UIE bit is set to
1, the 1 in UF causes the IRQF bit to be 1, which
asserts IRQ. Reading Register C clears this bit.
Bits 3 to 0: Unused. These unused bits always read 0
and cannot be written.
ever present, an exhausted internal lithium energy
source is indicated and both the contents of the RTC
data and RAM data are questionable.
Bits 6 to 0: Unused. These bits cannot be written and,
when read, always read 0.
BIT 3
BIT 3
0
0
Real-Time Clocks
BIT 2
BIT 2
0
0
BIT 1
BIT 1
0
0
BIT 0
BIT 0
0
0
LSB
LSB
17