DS1678S Maxim Integrated Products, DS1678S Datasheet - Page 19

• Manufacturer Part Number: DS1678S
• Description: IC RECORDER REALTIME EVENT 8SOIC
• Manufacturer: Maxim Integrated Products
• Type: Time Event Recorderr

Specifications of DS1678S

• Memory Size: 32B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 4 details how data transfer is accomplished on the 2-wire bus. Depending upon the state of the
R/
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the
2. Data transfer from a slave transmitter to a master receiver. The first byte (the slave address) is
The master device generates all of the serial clock pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus will not be released.
The DS1678 may operate in the following two modes:
1. Slave receiver mode (DS1678 write mode): Serial data and clock are received through SDA and
2. Slave transmitter mode (DS1678 read mode): The first byte is received and handled as in the slave
W
master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte.
transmitted by the master. The slave then returns an acknowledge bit. Next follows a number of data
bytes transmitted by the slave to the master. The master returns an acknowledge bit after all received
bytes other than the last byte. At the end of the last received byte, a “not acknowledge” is returned.
SCL. After each byte is received, the receiver transmits an acknowledge bit. START and STOP
conditions are recognized as the beginning and end of a serial transfer. The slave address byte is the
first byte received after the start condition is generated by the master. The address byte contains the 7-
bit DS1678 address, which is 1001010, followed by the direction bit (R/ W ), which is 0. The second
byte from the master is the register address. This sets the register pointer. If the write is being done to
set the register pointer, a STOP or repeated START may then be sent by the master. Otherwise, the
master then transmits each byte of data, with the DS1678 acknowledging each byte received. The
master will generate a stop condition to terminate the data write (See Figure 4).
receiver mode. However, in this mode, the direction bit will indicate that the transfer direction is
reversed. Serial data is transmitted on SDA by the DS1678 while the serial clock is input on SCL. The
slave address byte is the first byte received after the start condition is generated by the master. The
address byte contains the 7-bit DS1678 address, which is 1001010, followed by the direction bit
(R/ W ), which is 1. After receiving a valid slave address byte and direction bit, the DS1678 generates
an acknowledge on the SDA line. The DS1678 begins to transmit data on each SCL pulse starting
with the register address pointed to by the register pointer. As the master reads each byte, it must
generate an acknowledge. The DS1678 must receive a “not acknowledge” on the last byte to end a
read (See Figure 4).
bit, two types of data transfer are possible:
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