AD9878BST Analog Devices Inc, AD9878BST Datasheet - Page 2

• Manufacturer Part Number: AD9878BST
• Description: IC FRONT-END MIXED-SGNL 100-LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9878BST

• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Number Of Channels: 4
• Power (watts): 673mW
• Voltage - Supply, Analog: 3.3V
• Voltage - Supply, Digital: 3.3V
• Package / Case: 100-LQFP

AD9878
TABLE OF CONTENTS
Electrical Characteristics ................................................................. 4
Absolute Maximum Ratings............................................................ 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics ........................................... 10
Terminology .................................................................................... 13
Register Bit Definitions.................................................................. 14
Serial Interface for Register Control ............................................ 18
Theory of Operation ...................................................................... 20
Explanation of Test Levels ........................................................... 7
Thermal Characteristics .............................................................. 7
ESD Caution.................................................................................. 7
Register 0x00—Initialization .................................................... 15
Register 0x01—Clock Configuration....................................... 15
Register 0x02—Power-Down.................................................... 15
Register 0x03—Flag Control..................................................... 15
Register 0x04—∑-∆ Control Word........................................... 15
Register 0x07—Video Input Configuration............................ 16
Register 0x08—ADC Clock Configuration ............................ 16
Register 0x0C—Die Revision.................................................... 16
Register 0x0D—Tx Frequency Tuning Words LSBs.............. 16
Register 0x0E—DAC Gain Control ......................................... 16
Register 0x0F—Tx Path Configuration ................................... 16
Registers 0x10 Through 0x17—Burst Parameter................... 17
General Operation of the Serial Interface ............................... 18
Instruction Byte .......................................................................... 18
Serial Interface Port Pin Descriptions ..................................... 18
MSB/LSB Transfers..................................................................... 19
Notes on Serial Port Operation ................................................ 19
Transmit Path.............................................................................. 21
Data Assembler........................................................................... 21
Rev. A | Page 2 of 36
PCB Design Considerations.......................................................... 30
Outline Dimensions ....................................................................... 36
Transmit Timing......................................................................... 21
Interpolation Filter..................................................................... 21
Half-Band Filters (HBFs) .......................................................... 21
Cascade Integrator Comb (CIC) Filter.................................... 21
Combined Filter Response........................................................ 21
Digital Upconverter ................................................................... 22
Tx Signal Level Considerations ................................................ 22
Tx Throughput and Latency ..................................................... 23
DAC.............................................................................................. 23
Programming the AD8321/AD8323 or
AD8322/AD8327/AD8238 Cable-Driver Amplifiers............ 23
OSCIN Clock Multiplier ........................................................... 24
Clock and Oscillator Circuitry ................................................. 24
Programmable Clock Output REFCLK .................................. 24
Power-Up Sequence ................................................................... 26
Reset ............................................................................................. 26
Transmit Power-Down .............................................................. 26
∑-∆ Outputs ................................................................................ 27
Receive Path (Rx) ....................................................................... 27
IF10 and IF12 ADC Operation ................................................ 27
ADC Voltage References ........................................................... 29
Video Input ................................................................................. 29
Component Placement .............................................................. 30
Power Planes and Decoupling .................................................. 30
Ground Planes ............................................................................ 30
Signal Routing............................................................................. 30
Ordering Guide .......................................................................... 36