AD73311AR-REEL Analog Devices Inc, AD73311AR-REEL Datasheet - Page 6

IC ANALOG FRONT END 20-SOIC T/R

AD73311AR-REEL

Manufacturer Part Number
AD73311AR-REEL
Description
IC ANALOG FRONT END 20-SOIC T/R
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD73311AR-REEL

Rohs Status
RoHS non-compliant
Number Of Bits
16
Number Of Channels
2
Power (watts)
50mW
Voltage - Supply, Analog
3V
Voltage - Supply, Digital
3V
Package / Case
20-SOIC (7.5mm Width)

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD73311AR-REEL
Manufacturer:
AD
Quantity:
4 960
AD73311
Conditions
ADC On Only
ADC and DAC On
REFCAP On Only
REFCAP and
All Sections Off
All Sections Off
The above values are in mA and are typical values unless otherwise noted.
V
V
ADC
DAC
TIMING CHARACTERISTICS
Parameter
Clock Signals
Serial Port
REFOUT On Only 3.5
REFCAP
REFOUT
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
10
11
12
13
Maximum Input Range
at V
Nominal Reference Level
Maximum Voltage
Output Swing
Single-Ended
Differential
Nominal Voltage
Output Swing
Single-Ended
Differential
Output Bias Voltage
Analog
Current Current
8.5
14.5
0.8
0
0
IN
Internal Digital External Interface
6
6
1.5
0.01
Limit at
T
61
24.4
24.4
t
0.4 × t
0.4 × t
20
0
10
10
10
10
30
0
0
1
A
= –40 C to +85 C
Table II. Current Summary (AVDD = DVDD = +5.5 V)
1
1
(AVDD = +3 V
otherwise noted)
Current
2
2
0
0
0
0
3 V Power Supply
5VEN = 0
1.2 V ± 10%
1.2 V ± 10%
1.578 V p-p
1.0954 V p-p
1.578 V p-p
3.156 V p-p
1.0954 V p-p
2.1909 V p-p
V
REFOUT
Table III. Signal Ranges
10%; DVDD = +3 V
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns min
ns max
ns max
Total Current
16.5
22.5
1.0
3.5
1.7
0.02
1.578 V p-p
3.156 V p-p
1.0954 V p-p
2.1909 V p-p
5VEN = 0
1.2 V
1.2 V
1.578 V p-p
1.0954 V p-p
V
10%; AGND = DGND = 0 V; T
REFOUT
SE ON
1
1
0
0
0
0
5 V Power Supply
MCLK
YES
YES
NO
NO
YES
NO
Description
See Figure 1
MCLK Period
MCLK Width High
MCLK Width Low
See Figures 3 and 4
SCLK Period
SCLK Width High
SCLK Width Low
SDI/SDIFS Setup Before SCLK Low
SDI/SDIFS Hold After SCLK Low
SDOFS Delay from SCLK High
SDOFS Hold After SCLK High
SDO Hold After SCLK High
SDO Delay from SCLK High
SCLK Delay from MCLK
Comments
REFOUT Disabled
REFOUT Disabled
REFOUT Disabled
MCLK Active Levels Equal to
0 V and DVDD
Digital Inputs Static and
Equal to 0 V or DVDD
A
= T
5VEN = 1
MlN
2.4 V
2.4 V
3.156 V p-p
2.1908 V p-p
3.156 V p-p
6.312 V p-p
2.1908 V p-p
4.3818 V p-p
V
REFOUT
to T
MAX
, unless

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