AD9876ABSTRL Analog Devices Inc, AD9876ABSTRL Datasheet - Page 3

• Manufacturer Part Number: AD9876ABSTRL
• Description: IC 12BIT MODEM MXFE 48-LQFP TR
• Manufacturer: Analog Devices Inc

Specifications of AD9876ABSTRL

• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Number Of Channels: 1
• Power (watts): 950mW
• Voltage - Supply, Analog: 3.3V
• Voltage - Supply, Digital: 3.3V
• Package / Case: 48-LQFP
• Main Category: Single Chip
• Sub-category: Converter
• Power Supply Type: Analog/Digital
• Operating Supply Voltage (typ): 3.3V
• Package Type: LQFP
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 262mA
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Pin Count: 48
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Parameter
Rx PATH GAIN/OFFSET
Rx PATH INPUT CHARACTERISTICS
Rx PATH LPF (Low Cutoff Frequency)
Rx PATH LPF (High Cutoff Frequency)
Rx PATH DIGITAL HPF
Rx PATH DISTORTION PERFORMANCE
POWER-DOWN/DISABLE TIMING
REV. A
Minimum Programmable Gain
Maximum Programmable Gain (12 MHz Filter)
Maximum Programmable Gain (26 MHz Filter)
Gain Step Size
Gain Step Accuracy
Gain Range Error
Offset Error, PGA Gain = 0 dB
Absolute Gain Error
Input Voltage Range
Input Capacitance
Differential Input Resistance
Input Bandwidth (–3 dB)
Input Referred Noise (at –36 dB Gain with Filter)
Input Referred Noise (at –6 dB Gain with Filter)
Common-Mode Rejection
Cutoff Frequency
Cutoff Frequency Variation
Attenuation @ 22 MHz
Pass-Band Ripple
Group Delay Variation
Settling Time
Total Harmonic Distortion at Max Gain (THD)
Cutoff Frequency
Cutoff Frequency Variation
Attenuation @ 44 MHz
Pass-Band Ripple
Group Delay Variation
Settling Time
Total Harmonic Distortion at Max Gain (THD)
Latency (ADC Clock Source Cycles)
Roll-Off in Stop Band
–3 dB Frequency
IMD: f1 = 6.5 MHz, f2 = 7.7 MHz
12 MHz Filter : 0 dB Gain
26 MHz Filter : 0 dB Gain
DAC I
DAC I
Power-Down Delay (Active to Power-Down)
Power-Up Delay (Power-Down to Active)
Minimum RESET Pulsewidth Low (t
(to 1% FS, Min to Max Gain Change)
(to 1% FS, Min to Max Gain Change)
DAC
Interpolator
DAC
PLL
ADC
PGA
LPF
Interpolator
VRC
OUT
OUT
OFF after Tx QUIET Asserted
ON after Tx QUIET De-Asserted
: 30 dB Gain
: 30 dB Gain
RL
)
Temp
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
25°C
25°C
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
–3–
Test
Level
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
III
II
II
II
III
III
III
III
II
II
II
II
II
II
II
II
II
II
II
II
Min
Typ
–6
36
30
2
± 0.4
± 1.0
± 10
± 0.8
4
4
270
50
16
684
40
12
± 7
20
± 1.0
30
150
–68
26
± 7
20
± 1.2
15
80
–65
f
–65
–57
–65
–56
1
6
ADC
/400
Max
200
1
400
200
40
10
1000
1
1
200
2
5
dB
dB
dB
dB
dB
dB
Unit
dB
dB
dB
LSB
dB
Vppd
pF
Ω
MHz
µV rms
µV rms
MHz
%
dB
ns
ns
dBc
MHz
%
dB
ns
ns
dBc
Cycle
dB/Octave
Hz
dBc
dBc
dBc
dBc
ns
µs
ns
ns
µs
µs
µs
µs
µs
ns
µs
f
OSCIN
AD9876
Cycles