MCP3202-CI/P Microchip Technology, MCP3202-CI/P Datasheet - Page 20
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MCP3202-CI/P
Manufacturer Part Number
MCP3202-CI/P
Description
IC ADC 12BIT DUAL CHAN 8DIP
Manufacturer
Microchip Technology
Specifications of MCP3202-CI/P
Package / Case
8-DIP (0.300", 7.62mm)
Number Of Bits
12
Sampling Rate (per Second)
100k
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Architecture
SAR
Conversion Rate
100 KSPs
Resolution
12 bit
Input Type
Voltage
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP3202-CI/P
Manufacturer:
Microchip Technology
Quantity:
1 850
Part Number:
MCP3202-CI/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP3202
6.2
When the MCP3202 initiates the sample period, charge
is stored on the sample capacitor. When the sample
period is complete, the device converts one bit for each
clock that is received. It is important for the user to note
that a slow clock rate will allow charge to bleed off the
sample cap while the conversion is taking place. At
85°C (worst case condition), the part will maintain
proper charge on the sample capacitor for at least
1.2 ms after the sample period has ended. This means
that the time between the end of the sample period and
the time that all 12 data bits have been clocked out
must not exceed 1.2 ms (effective clock frequency of
10 kHz). Failure to meet this criteria may induce
linearity errors into the conversion outside the rated
specifications. It should be noted that during the entire
conversion cycle, the A/D Converter does not require a
constant clock speed or duty cycle, as long as all timing
specifications are met.
6.3
If the signal source for the A/D Converter is not a low-
impedance source, it will have to be buffered or
inaccurate conversion results may occur. It is also
recommended that a filter be used to eliminate any
signals that may be aliased back into the conversion
results. This is illustrated in
op amp is used to drive the analog input of the
MCP3202. This amplifier provides a low-impedance
output for the converter input and a low-pass filter,
which eliminates unwanted high frequency noise.
Low-pass (anti-aliasing) filters can be designed using
Microchip’s interactive FilterLab
will calculate capacitor and resistor values, as well as,
determine the number of poles that are required for the
application. For more information on filtering signals,
see the application note AN699 “Anti-Aliasing Analog
Filters for Data Acquisition Systems”.
”
FIGURE 6-3:
Amplifier is used to implement a 2nd order anti-
aliasing filter for the signal being converted by
the MCP3202.
DS21034E-page 20
V
IN
R
Maintaining Minimum Clock Speed
Buffering/Filtering the Analog
Inputs
1
R
C
C1
2
2
R
MCP601
3
The MCP601 Operational
+
-
R
4
Figure 6-3
®
IN+
IN-
software. FilterLab
MCP3202
below where an
V
DD
0.1 µF
10 µF
6.4
When laying out a printed circuit board for use with
analog components, care should be taken to reduce
noise wherever possible. A bypass capacitor should
always be used with this device and should be placed
as close as possible to the device pin. A bypass
capacitor value of 0.1 µF is recommended.
Digital and analog traces should be separated as much
as possible on the board and no traces should run
underneath the device or the bypass capacitor. Extra
precautions should be taken to keep traces with high
frequency signals (such as clock lines) as far as
possible from analog traces.
Use of an analog ground plane is recommended in
order to keep the ground potential the same for all
devices on the board. Providing V
devices in a “star” configuration can also reduce noise
by eliminating current return paths and associated
errors. See
tips
AN688 “Layout
Applications” (DS00688).
FIGURE 6-4:
‘Star’ configuration in order to reduce errors
caused by current return paths.
when
Device 1
Layout Considerations
Figure
using
Device 2
Tips
6-4. For more information on layout
Connection
V
A/D
© 2008 Microchip Technology Inc.
DD
for
V
DD
traces arranged in a
12-Bit
Converters,
Device 3
DD
A/D
Device 4
connections to
Converter
refer
to