MCP3204-CI/ST Microchip Technology, MCP3204-CI/ST Datasheet - Page 20

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MCP3204-CI/ST

Manufacturer Part Number
MCP3204-CI/ST
Description
IC ADC 12BIT 2.7V 4CH SPI14TSSOP
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP3204-CI/ST

Data Interface
Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
100k
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
12bit
Sampling Rate
100kSPS
Input Channel Type
Pseudo Differential, Single Ended
Supply Voltage Range - Analog
2.7V To 5.5V
Supply Current
320µA
Package
14TSSOP
Resolution
12 Bit
Architecture
SAR
Number Of Adcs
1
Number Of Analog Inputs
4|2
Digital Interface Type
Serial (4-Wire, SPI)
Input Type
Voltage
Polarity Of Input Voltage
Unipolar
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP3204-CI/ST
Manufacturer:
MICROCHIP
Quantity:
2 190
Part Number:
MCP3204-CI/ST
Manufacturer:
Microchip Technology
Quantity:
1 903
MCP3204/3208
FIGURE 5-1:
FIGURE 5-2:
DS21298E-page 20
CS
CLK
D
D
CS
CLK
D
D
IN
OUT
* After completing the data transfer, if further clocks are applied with CS low, the A/D converter will output zeros
indefinitely.
** t
high impedance node, leaving the CLK running to clock out LSB first data or zeroes.
* After completing the data transfer, if further clocks are applied with CS low, the A/D converter will output LSB
first data, followed by zeros indefinitely (see
** t
a high impedance node, leaving the CLK running to clock out the LSB-first data or zeros.
IN
OUT
DATA
DATA
: During this time, the bias circuit and the comparator power down while the reference input becomes a
: during this time, the bias current and the comparator power down while the reference input becomes
Start
Start
SGL/
DIFF
t
SUCS
HI-Z
D2
SGL/
DIFF
t
SUCS
HI-Z
Communication with the MCP3204 or MCP3208.
D1
Communication with MCP3204 or MCP3208 in LSB First Format.
D2
t
D0
SAMPLE
D1
Null
Bit
D0
t
(MSB)
SAMPLE
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10B11
Null
Bit B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0*
Figure 5-2
t
CONV
t
CYC
Don’t Care
below).
t
CONV
Don’t Care
t
CYC
Power Down
t
© 2008 Microchip Technology Inc.
DATA
t
CSH
t
DATA
**
**
Start
t
CSH
HI-Z
t
SGL/
DIFF
CYC
*
D2
HI-Z

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