AD7923BRUZ Analog Devices Inc, AD7923BRUZ Datasheet - Page 12

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AD7923BRUZ

Manufacturer Part Number
AD7923BRUZ
Description
IC ADC 12BIT 4CH W/SEQ 16TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7923BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
200k
Number Of Converters
1
Power Dissipation (max)
7.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
12bit
Sampling Rate
200kSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
2.7mA
Number Of Elements
1
Resolution
12Bit
Architecture
SAR
Sample Rate
200KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
2.5/5V
Differential Input
No
Power Supply Requirement
Analog and Digital
Single Supply Voltage (typ)
3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
7.5mW
Differential Linearity Error
±1.5LSB
Integral Nonlinearity Error
±1LSB
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Input Signal Type
Single-Ended
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7923CBZ - BOARD EVAL FOR AD7923
Lead Free Status / Rohs Status
Compliant

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AD7923
CONTROL REGISTER DESCRIPTIONS
The control register on the AD7923 is a 12-bit, write-only
register. Data is loaded from the DIN pin of the AD7923 on the
falling edge of SCLK. The data is transferred on the DIN line at
the same time that the conversion result is read from the part.
The data transferred on the DIN line corresponds to the
Table 5. Control Register Bit Functions
MSB
WRITE
Table 6.
Bit
11
10
7–6
5, 4
3
2, 9–8
1
0
Table 7. Channel Selection
ADD1
0
0
1
1
Name
WRITE
SEQ1
ADD1
ADD0
PM1
PM0
SEQ0
DONTC
RANGE
CODING
SEQ1
DONTC
Description
The value written to this bit of the control register determines whether the following 11 bits are loaded to the
control register. If this bit is a 1, the following 11 bits are written to the control register. If it is a 0, the remaining
11 bits are not loaded to the control register and it remains unchanged.
The SEQ1 bit in the control register is used with the SEQ0 bit to control the use of the sequencer function (see
Table 9).
These two address bits are loaded at the end of the present conversion and select which analog input channel is
converted in the next serial transfer, or they can also be used to select the final channel in a consecutive sequence,
as described in Table 9. The selected input channel is decoded, as shown in Table 7. The next channel to be
converted on is selected by the mux on the 14th SCLK falling edge. Channel address bits corresponding to the
conversion result are also output on the DOUT serial data stream prior to the 12 bits of data (see the Serial Interface
section).
Power management bits. These two bits decode the mode of operation of the AD7923, as shown in Table 8.
The SEQ0 bit in the control register is used with the SEQ1 bit to control the use of the sequencer function.
(see Table 9).
Don’t care.
This bit selects the analog input range to be used on the AD7923. If it is set to 0, the analog input range extends from
0 V to 2 × REF
to 2 × REF
This bit selects the type of output coding the AD7923 uses for the conversion result. If this bit is set to 0, the output
coding for the part is twos complement. If this bit is set to 1, the output coding from the part is straight binary (for
the next conversion).
ADD0
0
1
0
1
IN
range, AV
DONTC
IN
. If it is set to 1, the analog input range extends from 0 V to REF
DD
= 4.75 V to 5.25 V.
ADD1
V
V
V
V
Analog Input Channel
IN
IN
IN
IN
ADD0
Rev. B | Page 12 of 24
0
1
2
3
PM1
AD7923 configuration for the next conversion. This requires
16 serial clocks for every data transfer. Only the information
provided on the first 12 falling clock edges (after CS falling
edge) is loaded to the control register. MSB denotes the first bit
in the data stream. The bit functions are outlined in
PM0
SEQ0
IN
DONTC
(for the next conversion). For the 0 V
RANGE
Table 5
LSB
CODING
.

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